A filter capacitor discharge circuit includes a high-voltage terminal, a signal preparation circuit, a low-pass filter, a voltage level detector, a timer unit, and a switch unit. The signal preparation circuit receives a detection signal corresponding to an AC voltage from the high-voltage terminal, and generates a voltage signal according to the detection signal. The low-pass filter provides a filtered signal according to the voltage signal. The voltage level detector checks whether a voltage difference between the voltage signal and the filtered signal is less than a predetermined value. When the voltage difference is less than the predetermined value, the timer unit performs time calculation to accumulate a timing result. When the timing result exceeds a predetermined time, the switch unit is turned on so that the firster capacitor is discharged through the switch unit.

The present disclosure is generally directed to utilizing capacitors stacks with capacitors mounted in a terminal-to-terminal mounting orientation to reduce overall footprint of capacitor arrays for bypass filtering circuits. In an embodiment, each capacitor stack includes at least a first capacitor, a second capacitor, and a ground plane interconnect. The first capacitor includes first and second terminals disposed opposite each other. The first terminal provides a mating surface to couple to the second capacitor, the second terminal couples to a ground plane. The second capacitor includes first and second terminals disposed opposite each other. The first terminal provides a mounting surface to electrically couple to and support the first capacitor, and the second terminal provides a mating surface to electrically and physically couple to the ground plane. Accordingly, the first capacitor can be inverted and mounted atop the second capacitor to eliminate the necessity of wire bonds, for example.

An interdigitated RF filter. The interdigitated RF filter includes input fingers connected to an input node and output fingers connected to an output node where at least one input finger is connected the output node or at least one output finger is connected to the input node. The described interdigitated RF filter can be implemented in various configurations such as series, shunt, ladder or a combination thereof.

Disclosed are apparatus and a method for providing an integrated multiterminal multilayer ceramic device that has three or more capacitive elements. Two of such capacitive elements may be in series, with a third in parallel. The integrated device may be packaged as an overmolded three leaded component, or can be mounted as SMD (surface mount device). The integrated device may also be combined with a separate varistor in a stacked arrangement of leaded components.

An inductive-capacitive filter includes a first insulating-conductive strip wound around a winding axis, where the first insulating-conductive strip includes a first conductive strip joined with a first insulating strip. An inductive-capacitive filter assembly includes a first and a second insulating-conductive strip concentrically wound around a winding axis, the first insulating-conductive strip including a first conductive strip joined with a first insulating strip, and the second insulating-conductive strip including a second conductive strip joined with a second insulating strip.

An electronic device may include wireless circuitry having an LC filter. The LC filter may include first and second series inductors coupled between the input and output of the LC filter. An input capacitor can be coupled at the input of the LC filter, and an output capacitor can be coupled at the output of the LC filter. Feedforward capacitors can be cross-coupled with the first and second series inductors to at least partially or fully cancel out any parasitic capacitance associated with the first and second series inductors to mitigate any undesired self-resonant effects associated with the series inductors.

A half-bride combiner can be implemented as a coupling circuit having a common node and configured to couple the common node to one of first and second groups of filters through a first path and to couple the common node to the other group through a second path. The coupling circuit can be further configured such that the impedance provided by each filter of the one of the first and second groups for a signal in each band of the other group results in the signal being sufficiently excluded from the first path.

A coupling circuit can be configured to couple a common node to a first group of filters through a first path and to couple the common node to a second group of one or more filters through a second path. The coupling circuit can be configured such that an impedance provided by each filter of the first group for a signal in each band of the second group results in the signal being sufficiently excluded from the first path, and such that an impedance provided by each filter of the second group for a signal in each band of the first group results in the signal being sufficiently excluded from the second path. The first path can present a first impedance to the coupling circuit, and the second path can present a second impedance to the coupling circuit, such that complex part of the first impedance is a conjugate of complex part of the second impedance.

An architecture can include a first group of filters each configured to support a band such that a first frequency range covers the respective bands, and a second group of one or more filters each configured to support a band such that a second frequency range covers the respective one or more bands. Each filter of the first group can be configured to provide an impedance at or near a short circuit impedance for a signal in each band of the second group, and each filter of the second group can be configured to provide an impedance at or near a short circuit impedance for a signal in each band of the first group. The filters of the first and second groups can be implemented as one or more multiplexers. The architecture can further include a coupling circuit having a common node and configured to couple the common node to the one or more multiplexers through a first path and a second path. The coupling circuit can be further configured such that the impedance provided by each filter of the first group for the signal in each band of the second group results in the signal being sufficiently excluded from the first path, and such that the impedance provided by each filter of the second group for the signal in each band of the first group results in the signal being sufficiently excluded from the second path.

A bridge combiner can be implemented as a coupling circuit that includes a common node and configured to couple the common node to a first group of filters through a first path and to couple the common node to a second group of one or more filters through a second path. The coupling circuit can include a resonator such that an impedance provided by each filter of the first group for a signal in each band of the second group results in the signal being sufficiently excluded from the first path, and such that an impedance provided by each filter of the second group for a signal in each band of the first group results in the signal being sufficiently excluded from the second path.