The application provides an attenuator and a differential voltage probe, comprising a forward attenuation circuit and a reverse attenuation circuit which are symmetrical with each other, a first compensation unit and a third compensation unit which are symmetrical with each other, a second compensation unit and a fourth compensation unit which are symmetrical with each other, and a differential amplifier; the four compensation units are all adjustable capacitor units composed of constant capacitance; a positive-going signal to be tested is attenuated by the forward attenuation circuit, and frequency characteristics of a preset frequency point are adjusted by the first compensation unit and second compensation unit; a negative-going signal to be tested is attenuated by the reverse attenuation circuit, and frequency characteristics of a preset frequency point are adjusted by the third compensation unit and fourth compensation unit; finally, the difference value is calculated by the differential amplifier, amplified and output.

The application provides an attenuator and a differential voltage probe, comprising a forward attenuation circuit and a reverse attenuation circuit which are symmetrical with each other, a first compensation unit and a third compensation unit which are symmetrical with each other, a second compensation unit and a fourth compensation unit which are symmetrical with each other, and a differential amplifier; the four compensation units are all adjustable capacitor units composed of constant capacitance; a positive-going signal to be tested is attenuated by the forward attenuation circuit, and frequency characteristics of a preset frequency point are adjusted by the first compensation unit and second compensation unit; a negative-going signal to be tested is attenuated by the reverse attenuation circuit, and frequency characteristics of a preset frequency point are adjusted by the third compensation unit and fourth compensation unit; finally, the difference value is calculated by the differential amplifier, amplified and output.

An exponentially-scaling switched impedance circuit includes: two or more impedance scaling circuits, wherein each impedance scaling circuit comprises: an input port; an output port; and a switched impedance circuit connected in parallel to the output port. Each impedance scaling circuit is configured to provide an effective impedance at the input port corresponding to a scaled-down version of the exponentially-scaling switched impedance circuit. The two or more impedance scaling circuits are connected in a cascade such that an input of an impedance scaling circuit is connected to an output of a previous impedance scaling circuit and/or an output of the impedance scaling circuit is connected to an input of a next impedance scaling circuit.

A programmable (multistep) resistor attenuator architecture (such as for input to a differential amplifier) provides cancellation for harmonic distortion currents. An attenuation node is coupled: (a) to an input node through R; (b) to a virtual ground through kR and a virtual ground switch Swf with on-resistance Rswf; and (c) to a differential ground through mR and a differential ground switch Swp with on-resistance Rswp. Swp can be sized relative to Swf such that a component Ipnf of Ipn through Rswp and mR to the attenuation node, and branching into kR and Rswf, matches (phase/magnitude), a harmonic current Ifn from the virtual ground through Rswf and kR to the attenuation node. Harmonic distortion cancelation at the virtual ground can be based on matching switches Swf and Swp and the resistors R, mR, kR, reducing sensitivity to PVT variations, input frequency and amplitude. The attenuator architecture is extendable to multistage configurations.

A programmable (multistep) resistor attenuator architecture (such as for input to a differential amplifier) provides cancellation for harmonic distortion currents. An attenuation node is coupled: (a) to an input node through R; (b) to a virtual ground through kR and a virtual ground switch Swf with on-resistance Rswf; and (c) to a differential ground through mR and a differential ground switch Swp with on-resistance Rswp. Swp can be sized relative to Swf such that a component Ipnf of Ipn through Rswp and mR to the attenuation node, and branching into kR and Rswf, matches (phase/magnitude), a harmonic current Ifn from the virtual ground through Rswf and kR to the attenuation node. Harmonic distortion cancelation at the virtual ground can be based on matching switches Swf and Swp and the resistors R, mR, kR, reducing sensitivity to PVT variations, input frequency and amplitude. The attenuator architecture is extendable to multistage configurations.

Provided is a voltage divider circuit having a small area and good accuracy of a division ratio. Among a plurality of resistors of the voltage divider circuit, each of resistors having a large resistance value, that is, resistors (1/4R, 1/2R, 1R, 9R, 10R) having high required accuracy of ratio includes first unit resistors (5A) that have a first resistance value and are connected in series or connected in parallel to each other, and each of resistors having a small resistance value, that is, resistors (1/16R, 1/8R) having low required accuracy of ratio includes second unit resistors (5B) that have a second resistance value smaller than the first resistance value and are connected in parallel to each other.

Provided is a voltage divider circuit having a small area and good accuracy of a division ratio. Among a plurality of resistors of the voltage divider circuit, each of resistors having a large resistance value, that is, resistors (1/4R, 1/2R, 1R, 9R, 10R) having high required accuracy of ratio includes first unit resistors (5A) that have a first resistance value and are connected in series or connected in parallel to each other, and each of resistors having a small resistance value, that is, resistors (1/16R, 1/8R) having low required accuracy of ratio includes second unit resistors (5B) that have a second resistance value smaller than the first resistance value and are connected in parallel to each other.

A common mode filter includes a body portion including a plurality of external electrodes disposed externally on the body portion, a first filter portion disposed within the body portion and including a plurality of coil electrode layers, and a second filter portion disposed within the body portion and including a plurality of coil electrode layers. The first filter portion and the second filter portion are connected to each other in series, and an area of the plurality of coil electrode layers of the first filter portion and an area of the plurality of coil electrode layers of the second filter portion are different from each other.

A common mode filter includes a body portion including a plurality of external electrodes disposed externally on the body portion, a first filter portion disposed within the body portion and including a plurality of coil electrode layers, and a second filter portion disposed within the body portion and including a plurality of coil electrode layers. The first filter portion and the second filter portion are connected to each other in series, and an area of the plurality of coil electrode layers of the first filter portion and an area of the plurality of coil electrode layers of the second filter portion are different from each other.

The disclosure concerns a signal aggregator component designed to couple with an antenna element to form an antenna system, wherein the resulting antenna system can achieve one-hundred percent or greater efficiency in receiving mode. In addition, the antenna system can achieve specific polarization and gain in different sectors of the antenna radiation pattern. The signal aggregator functions to dynamically enable or disable any number of its RF ports to select the RF input signal to aggregate.