The present invention is directed to communication systems and electrical circuits. According to an embodiment, the present invention provides a termination circuit that includes an inductor network. The inductor network is coupled to a termination resistor and a capacitor network, which includes a first capacitor and a second capacitor. The termination resistor, the first capacitor, and the second capacitor are adjustable, and they affect attenuation of the termination circuit. There are other embodiments as well.

The present invention is directed to communication systems and electrical circuits. According to an embodiment, the present invention provides a termination circuit that includes an inductor network. The inductor network is coupled to a termination resistor and a capacitor network, which includes a first capacitor and a second capacitor. The termination resistor, the first capacitor, and the second capacitor are adjustable, and they affect attenuation of the termination circuit. There are other embodiments as well.

Disclosed are an apparatus for monitoring pulsed high-frequency power and a substrate processing apparatus including the same. The apparatus includes an attenuation module configured to attenuate a pulsed high-frequency power signal; a rectifier module configured to convert the pulsed high-frequency power signal into a direct current signal; and a detection module configured to detect a pulse parameter based on the direct current signal.

Disclosed are an apparatus for monitoring pulsed high-frequency power and a substrate processing apparatus including the same. The apparatus includes an attenuation module configured to attenuate a pulsed high-frequency power signal; a rectifier module configured to convert the pulsed high-frequency power signal into a direct current signal; and a detection module configured to detect a pulse parameter based on the direct current signal.

A matching circuit includes first and second ports, an autotransformer, and first and second capacitors. The autotransformer includes a first terminal coupled to a first port, a second terminal coupled to a second port, and a common terminal coupled to a reference potential, and includes a series parasitic inductor and a parallel parasitic inductor. The first capacitor is coupled in shunt to the second terminal, and defines a low pass filter together with the series parasitic inductor. The second capacitor is coupled in series between the first port and the first terminal, and defines a high pass filter together with the parallel parasitic inductor.

A matching circuit includes first and second ports, an autotransformer, and first and second capacitors. The autotransformer includes a first terminal coupled to a first port, a second terminal coupled to a second port, and a common terminal coupled to a reference potential, and includes a series parasitic inductor and a parallel parasitic inductor. The first capacitor is coupled in shunt to the second terminal, and defines a low pass filter together with the series parasitic inductor. The second capacitor is coupled in series between the first port and the first terminal, and defines a high pass filter together with the parallel parasitic inductor.

A wireless communication device includes a base sheet in a folded state, a first conductor pattern disposed on a first principal surface of the base sheet, a second conductor pattern disposed on a second principal surface of the base sheet opposite to the first principal surface, an RFIC chip disposed on the base sheet so as to electrically connect to the first conductor pattern, and a sheet-shaped connection conductor coupled to a turning part of the base sheet so as to partially overlap with an end portion of the first conductor pattern near the turning part and an end portion of the second conductor pattern near the turning part.

A wireless communication device includes a base sheet in a folded state, a first conductor pattern disposed on a first principal surface of the base sheet, a second conductor pattern disposed on a second principal surface of the base sheet opposite to the first principal surface, an RFIC chip disposed on the base sheet so as to electrically connect to the first conductor pattern, and a sheet-shaped connection conductor coupled to a turning part of the base sheet so as to partially overlap with an end portion of the first conductor pattern near the turning part and an end portion of the second conductor pattern near the turning part.

A plasma etching method and a semiconductor device fabrication method, the plasma etching method including providing a source power having a first single pulse to an electrostatic chuck in order to generate a plasma on a substrate; providing a first bias power having a burst pulse different from the first single pulse to concentrate the plasma on the substrate; and providing a second bias power having a second single pulse the same as the first single pulse to accelerate the plasma toward the substrate.

A plasma etching method and a semiconductor device fabrication method, the plasma etching method including providing a source power having a first single pulse to an electrostatic chuck in order to generate a plasma on a substrate; providing a first bias power having a burst pulse different from the first single pulse to concentrate the plasma on the substrate; and providing a second bias power having a second single pulse the same as the first single pulse to accelerate the plasma toward the substrate.