An active filter is connected in parallel to a rectifier circuit between a set of AC input lines and a pair of DC buses. The active filter includes a capacitor, a pair of current limiting elements and an inverter. One in the current limiting elements is disposed between one end of the capacitor and one in the DC buses. Other in the current limiting elements is disposed between other end of the capacitor and other in the DC buses. At least one of the current limiting elements is disposed in an orientation to be forward with respect to a DC voltage outputted by the rectifier circuit. The inverter includes: a set of AC-side terminals connected to the set of AC input lines; and a pair of DC-side terminals connected to both ends of the capacitor.

An apparatus includes an impedance circuit and a plurality of inductors coupled to the impedance circuit. Each of the plurality of inductors is coupled in parallel to a corresponding switch of a plurality of switches.

An apparatus includes an impedance circuit and a plurality of inductors coupled to the impedance circuit. Each of the plurality of inductors is coupled in parallel to a corresponding switch of a plurality of switches.

Some embodiments include a nonlinear transmission line system comprising: a power supply providing voltages greater than 100 V; a high frequency switch electrically coupled with the power supply; a nonlinear transmission line electrically coupled with the switch; an antenna electrically coupled with the nonlinear transmission line; and an energy recovery circuit comprising a diode and an inductor electrically coupled with the power supply and the antenna.

Some embodiments include a nonlinear transmission line system comprising: a power supply providing voltages greater than 100 V; a high frequency switch electrically coupled with the power supply; a nonlinear transmission line electrically coupled with the switch; an antenna electrically coupled with the nonlinear transmission line; and an energy recovery circuit comprising a diode and an inductor electrically coupled with the power supply and the antenna.

An integrated circuit includes a substrate, a reference contact coupled to the substrate, a capacitor over the substrate, and a substrate element. The capacitor includes a first conductive element having an associated parasitic capacitance and a second conductive element electrically isolated from the first conductive element. The substrate element is coupled to the first conductive element by the parasitic capacitance and coupled to the reference contact. The substrate element includes a conductive doped region in the substrate and aligned with the first conductive element and the reference contact.

An integrated circuit includes a substrate, a reference contact coupled to the substrate, a capacitor over the substrate, and a substrate element. The capacitor includes a first conductive element having an associated parasitic capacitance and a second conductive element electrically isolated from the first conductive element. The substrate element is coupled to the first conductive element by the parasitic capacitance and coupled to the reference contact. The substrate element includes a conductive doped region in the substrate and aligned with the first conductive element and the reference contact.

Methods and devices to address body leakage current generation and bias voltage distribution associated with body leakage current in an OFF state of a FET switch stack are disclosed. The devices include charge redistribution arrangements and bridge networks to perform coupling/decoupling to/from the FET switch stack. Detailed structures of such bridge networks are also described.

Disclosed herein are tunable reactance circuits configured to present a tunable or variable capacitive reactance when energized. The circuits can include a switch configured to be controlled by a gate driver, the gate driver configured to receive a control signal indicating an on-time of the switch; a diode coupled antiparallel to a switch; and one or more capacitors coupled in parallel to the diode. The tunable capacitive reactance can be based on the on-time of the switch and a total capacitance value of the one or more capacitors. The exemplary tunable reactance circuits may be used in wireless power transmitters and/or receivers for efficient power transmission and/or to deliver a particular level of power to a load.

Disclosed herein are tunable reactance circuits configured to present a tunable or variable capacitive reactance when energized. The circuits can include a switch configured to be controlled by a gate driver, the gate driver configured to receive a control signal indicating an on-time of the switch; a diode coupled antiparallel to a switch; and one or more capacitors coupled in parallel to the diode. The tunable capacitive reactance can be based on the on-time of the switch and a total capacitance value of the one or more capacitors. The exemplary tunable reactance circuits may be used in wireless power transmitters and/or receivers for efficient power transmission and/or to deliver a particular level of power to a load.