H03H19/004

Microelectromechanical Tunable Delay Line Circuit
20220077848 · 2022-03-10 ·

Tunable delay circuit devices have an input port, an output port, at least three parallel paths connecting the input port and the output port, on each path, an input switch and an output switch, and on each path, a plurality of shunt resonant tanks connected between the input switch and the output switch, each shunt resonant tank periodically chargeable from the input port and dischargeable to the output port by operation of the input switch and the output switch.

GLITCH FILTER HAVING A SWITCHED CAPACITANCE AND RESET STAGES
20210336606 · 2021-10-28 ·

A glitch filter is provided. The glitch filter receives an input signal and sets a voltage level of an intermediary input node in accordance with a state of the input signal. The glitch filter charges or discharges a switched capacitance based on the voltage level of the intermediary input node and charges or discharges a filter capacitance based on a charge of the switched capacitance. The glitch filter sets a state of an output signal based on the charge of the filter capacitance. The glitch filter includes a reset stage that at least partially filters a burst of glitches in the input signal from the output signal by controlling the charge of the switched capacitance based on the state of the input signal and the state of the output signal.

Multi-stage switched capacitor circuit and operation method thereof

A multi-stage switched capacitor circuit and an operation method thereof are provided. The multi-stage switched capacitor circuit includes a first operational stage, a second operational stage and a third operational stage that are serially connected in order. Each operational stage operates in a sample phase or a hold phase and generates a detection signal indicating an end of the hold phase. The operation method of the multi-stage switched capacitor circuit includes: controlling the second operational stage to operate in the hold phase when the detection signal of the first operational stage indicates the end of the hold phase of the first operational stage, and the detection signal of the third operational stage indicates the end of the hold phase of the third operational stage.

VARIABLE CAPACITOR BANK
20210313969 · 2021-10-07 ·

A variable capacitor bank includes a conductive housing and a port extending through the housing. An electrical bus is disposed within the conductive housing and coupled to the port. The variable capacitor bank further includes capacitor modules disposed within the housing. Each capacitor module includes a module input electrically coupled to the electrical bus and a switched capacitor branch electrically coupled to the module input, the switched capacitor branch including a capacitor and a switch element in series with the capacitor. In certain implementations, one or more of the capacitor modules may include at least one second switched capacitor branch. The capacitor modules may further include an unswitched, or “floor”, capacitor that provides a minimum or otherwise known capacitance of the capacitor module. Each capacitor module may further be grounded by being electrically coupled to the conductive housing.

PROGRAMMABLE BASEBAND FILTER FOR SELECTIVELY COUPLING WITH AT LEAST A PORTION OF ANOTHER FILTER

An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and selectively coupling at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.

ACTIVE DISCHARGE SYSTEM FOR ELECTRIC OR HYBRID MOTOR VEHICLES

An active discharge system for electric or hybrid motor vehicles including an active discharge circuit operatively connected in parallel to a charge circuit, which is supplied by a high voltage power source and defines an electrically-charged equivalent capacitance of an electric charge, wherein the active discharge circuit is configured to discharge the electric charge accumulated by the equivalent capacitance in the event of the high voltage power source being disconnected from the charge circuit; a control circuit/device/unit/component of the active discharge circuit which are configured to receive an activation signal, suitable to activating the active discharge circuit in case of receiving the activation signal, so as to discharge the equivalent capacitance.

TIME-CONTROLLED SWITCH CAPACITOR BASED TEMPERATURE SENSOR
20210262864 · 2021-08-26 · ·

An apparatus comprises: a first circuitry to charge first and second capacitors to a predetermined voltage level; a second circuitry to discharge the first capacitor through a diode at a first time; a third circuitry to discharge the second capacitor through the diode at a second time, wherein the second time is greater than the first time; a comparator to compare a first voltage of the first capacitor with a second voltage of the second capacitor; and logic to adjust a scaling factor applied to the second voltage according to an output of the comparator.

Tunable filter for RF circuits
11121701 · 2021-09-14 · ·

A tunable filter is described where the frequency response as well as bandwidth and transmission loss characteristics can be dynamically altered, providing improved performance for transceiver front-end tuning applications. The rate of roll-off of the frequency response can be adjusted to improve performance when used in duplexer applications. The tunable filter topology is applicable for both transmit and receive circuits. A method is described where the filter characteristics are adjusted to account for and compensate for the frequency response of the antenna used in a communication system.

PFM CONTROL CIRCUIT, PFM CONTROL SYSTEM AND PFM CONTROL METHOD

A PFM control circuit includes a switching circuit, a slope-decision circuit, a flip-flop, a first and a second comparison circuits. The first comparison circuit outputs a first signal according to an output voltage of a power conversion circuit. The switching circuit outputs a switching signal according to an output current of the power conversion circuit. The slope-decision circuit outputs a slope modulation voltage, and determines a slope modulation voltage with a first or a second slope according to the switching signal. The second comparison circuit outputs the second signal according to the slope modulation voltage. The flip-flop outputs a control signal to the power conversion circuit according to the first and the second signals. When the slope modulation voltage has the first or the second slope, the control signal has a first or a second frequency accordingly. The first frequency is higher than the second frequency.

Multi-stage switched capacitor circuit and operation method thereof
20210203347 · 2021-07-01 ·

A multi-stage switched capacitor circuit and an operation method thereof are provided. The multi-stage switched capacitor circuit includes a first operational stage, a second operational stage and a third operational stage that are serially connected in order. Each operational stage operates in a sample phase or a hold phase and generates a detection signal indicating an end of the hold phase. The operation method of the multi-stage switched capacitor circuit includes: controlling the second operational stage to operate in the hold phase when the detection signal of the first operational stage indicates the end of the hold phase of the first operational stage, and the detection signal of the third operational stage indicates the end of the hold phase of the third operational stage.