A system and method for efficiently storing and driving data between pipeline stages. In various embodiments, a flip-flop circuit includes a bypass circuit, which is a tri-state inverter, and the bypass circuit receives a clock signal and a version of a data signal. When the clock signal received by the flip-flop circuit is asserted, the output of the bypass circuit is sent as the output of the flip-flop circuit. In one example, the version of the data signal received by the bypass circuit is the data signal. In another example, the version of the data signal received by the bypass circuit is the output of a master latch. Although the output of the master latch is pre-charged, when the clock is asserted, each of a late arriving rising and falling data transition are included in the critical path of the flip-flop circuit.

A switching assembly for transferring trains of pulses, including a first terminal and a second terminal. A first plurality of first relays is connected in parallel, and have first contacts connected to the first assembly terminal, and second contacts. A first capacitor is connected in parallel with the first relays. A second plurality of second relays is connected in parallel, and have third contacts, and fourth contacts connected to the second assembly terminal. A second capacitor is connected in parallel with the second relays. A connection connects the second contacts to the third contacts. The pulses have amplitudes of at least 2 kilovolts. On activation of the first and second relays the first and second contacts connect and the third and fourth contacts connect, so that the first and second assembly terminals connect. On deactivation of the first and second relays the first and second assembly terminals disconnect.

A pulse generation system is disclosed. The pulse generation system includes a controller, an output terminal, and a plurality of pulse generator circuits. The controller is configured to cause a driving signal pulse to be transmitted to any selected one or more of the pulse generator circuits, and to cause the driving signal pulse to not be transmitted to any selected one or more other pulse generator circuits. Each of the pulse generator circuits is configured to generate an output voltage pulse at the output terminal in response to the driving signal pulse being transmitted thereto.

A pulse generation system is disclosed. The pulse generation system includes a controller, an output terminal, and a plurality of pulse generator circuits. The controller is configured to cause a driving signal pulse to be transmitted to any selected one or more of the pulse generator circuits, and to cause the driving signal pulse to not be transmitted to any selected one or more other pulse generator circuits. Each of the pulse generator circuits is configured to generate an output voltage pulse at the output terminal in response to the driving signal pulse being transmitted thereto.

A hardware based block moving controller of an active device such as an implantable medical device that provides electrical stimulation reads a parameter data from a block of memory and then writes the parameter data to a designated register set of a component that performs an active function. The block of memory may include data that specifies a size of the block of memory to be moved to the register set. The block of memory may also include data that indicates a number of triggers to skip before moving a next block of memory to the register set. A trigger that causes the block moving controller to move the data from the block of memory to the register set may be generated in various ways such as through operation of the component having the register set or by a separate timer.

The present disclosure provides systems and methods for an output architecture for an implantable pulse generator of a neurostimulation system. The output architecture includes a power supply, a plurality of outputs, a global source current regulator coupled to the power supply and operable to source current from the power supply to the plurality of outputs through a plurality of source current branches, a global sink current regulator operable to sink current from the plurality of outputs to ground through a plurality of sink current branches, a current source branch selector operable to select, for each of the plurality of outputs, an amount of current sourced from the plurality of source current branches, and a current sink branch selector operable to select, for each of the plurality of outputs, an amount of current sunk to the plurality of sink current branches.

A hardware based block moving controller of an active device such as an implantable medical device that provides electrical stimulation reads a parameter data from a block of memory and then writes the parameter data to a designated register set of a component that performs an active function. The block of memory may include data that specifies a size of the block of memory to be moved to the register set. The block of memory may also include data that indicates a number of triggers to skip before moving a next block of memory to the register set. A trigger that causes the block moving controller to move the data from the block of memory to the register set may be generated in various ways such as through operation of the component having the register set or by a separate timer.

A description is given of an apparatus for disconnecting a connection between solar modules of a photovoltaic string. A circuit breaker, a band-stop filter and a supply circuit are arranged in a series circuit between a first and second terminal. The series circuit is configured to conduct a current that includes a DC string current flowing through the photovoltaic string and a high-frequency control signal modulated onto the DC string current. The supply circuit is configured to generate energy to power the apparatus from the DC string current. An AC bypass circuit bridges the circuit breaker in parallel and is configured to conduct the high-frequency control signal. A control unit is configured to operate the apparatus based on the high-frequency control signal. A reverse current diode oppositely polarized relative to an operating current flow is connected in parallel with the circuit breaker or the circuit breaker and the band-stop filter.

A current control circuit having a current regulation element, a first control circuit, and a second control circuit. The first control circuit is arranged to regulate, based on a reference current, a current flowing with respect to the current regulation element. The second control circuit is arranged to regulate, based on a reference voltage, a voltage across the current regulation element.

A current control circuit having a current regulation element, a first control circuit, and a second control circuit. The first control circuit is arranged to regulate, based on a reference current, a current flowing with respect to the current regulation element. The second control circuit is arranged to regulate, based on a reference voltage, a voltage across the current regulation element.