A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor. The system may additionally include a modulator for generating a differential pulse-width modulation driving signal to the first high-side switch, the second high-side switch, the first low-side switch, and the second low-side switch and pilot tone injection circuitry configured to inject a periodic pilot tone into the differential pulse-width modulation driving signal at a pilot tone frequency.

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor. The system may additionally include a modulator for generating a differential pulse-width modulation driving signal to the first high-side switch, the second high-side switch, the first low-side switch, and the second low-side switch and pilot tone injection circuitry configured to inject a periodic pilot tone into the differential pulse-width modulation driving signal at a pilot tone frequency.

An electronic circuit includes a ramp signal generator, an oscillator, a monitoring circuit and a logic controller. The ramp signal generator generates a ramp signal. The oscillator generates a clock signal. The monitoring circuit operates in an operation mode selected from a first mode of monitoring an external output voltage and a second mode of performing an analog built-in self-test (ABIST), and generates a comparator output. The logic controller controls the monitoring circuit to operate in the operation mode. When the monitoring circuit operates in the second mode, the logic controller counts the clock signal, controls the monitoring circuit to perform the ABIST based on the ramp signal, and generates an ABIST output indicating whether the monitoring circuit operates normally based on a value of the counting and the comparator output.

An electronic circuit includes a ramp signal generator, an oscillator, a monitoring circuit and a logic controller. The ramp signal generator generates a ramp signal. The oscillator generates a clock signal. The monitoring circuit operates in an operation mode selected from a first mode of monitoring an external output voltage and a second mode of performing an analog built-in self-test (ABIST), and generates a comparator output. The logic controller controls the monitoring circuit to operate in the operation mode. When the monitoring circuit operates in the second mode, the logic controller counts the clock signal, controls the monitoring circuit to perform the ABIST based on the ramp signal, and generates an ABIST output indicating whether the monitoring circuit operates normally based on a value of the counting and the comparator output.

In an embodiment, an amplifier circuit includes a second stage that includes a first switch circuit including first and second terminals, a plurality of resistive elements coupled between the first and second terminals of the first switch circuit, and a plurality of switches configured to control an equivalent resistance between the first and second terminals of the first switch circuit. During play mode, the second stage has a gain between the input of the second stage and the output of the second stage of a first value. During a transition from mute mode to play mode, the amplifier circuit is configured to progressively increase the gain of the second stage from a second value to the first value. During a transition from play mode to mute mode, the amplifier circuit is configured to progressively decrease the gain of the second stage from the first value to the second value.

In an embodiment, an amplifier circuit includes a second stage that includes a first switch circuit including first and second terminals, a plurality of resistive elements coupled between the first and second terminals of the first switch circuit, and a plurality of switches configured to control an equivalent resistance between the first and second terminals of the first switch circuit. During play mode, the second stage has a gain between the input of the second stage and the output of the second stage of a first value. During a transition from mute mode to play mode, the amplifier circuit is configured to progressively increase the gain of the second stage from a second value to the first value. During a transition from play mode to mute mode, the amplifier circuit is configured to progressively decrease the gain of the second stage from the first value to the second value.

An electrical system includes a motor and a plurality of switch pairs, each switch pair having a high-side switch, a low-side switch, and a switch node coupled to the motor. The electrical system also includes gate driver circuitry coupled to each switch of the plurality of switch pairs. The electrical system also includes a controller coupled to the gate driver circuitry. The controller is configured to direct the gate driver circuitry to provide a first set of gate drive signals together with (i.e., overlapping pulses) a second set of gate drive signals, wherein the first set of gate drive signals is phase-shifted relative to the second set of gate drive signals.

An electrical system includes a motor and a plurality of switch pairs, each switch pair having a high-side switch, a low-side switch, and a switch node coupled to the motor. The electrical system also includes gate driver circuitry coupled to each switch of the plurality of switch pairs. The electrical system also includes a controller coupled to the gate driver circuitry. The controller is configured to direct the gate driver circuitry to provide a first set of gate drive signals together with (i.e., overlapping pulses) a second set of gate drive signals, wherein the first set of gate drive signals is phase-shifted relative to the second set of gate drive signals.

A PWM modulator has a quantizer that generates a PWM output signal to speaker driver. When a first voltage swing range is supplied to the speaker driver, the quantizer analog gain is controlled to be a first gain value. When a second PWM drive voltage swing range is supplied to the speaker driver, the analog gain is controlled to be a second gain value. The first and second gain values of the analog gain of the quantizer cause the combined gain of the quantizer and driver to be approximately equal in the two modes. The quantizer has at least two gain-affecting measurable non-ideal characteristics. The quantizer is adjustable using measured first and second values to correct for first and second of the at least two non-ideal characteristics. The gain of the quantizer is calibratable while the quantizer is adjusted using the measured first and second measured values.

A PWM modulator has a quantizer that generates a PWM output signal to speaker driver. When a first voltage swing range is supplied to the speaker driver, the quantizer analog gain is controlled to be a first gain value. When a second PWM drive voltage swing range is supplied to the speaker driver, the analog gain is controlled to be a second gain value. The first and second gain values of the analog gain of the quantizer cause the combined gain of the quantizer and driver to be approximately equal in the two modes. The quantizer has at least two gain-affecting measurable non-ideal characteristics. The quantizer is adjustable using measured first and second values to correct for first and second of the at least two non-ideal characteristics. The gain of the quantizer is calibratable while the quantizer is adjusted using the measured first and second measured values.