A modulator spreads the spectrum of a generated clock to reduce Electro-Magnetic Interference (EMI). A capacitor is charged by a variable current to generate a ramp voltage that is compared to a reference to end a clock cycle and discharge the capacitor. An up-down counter drives a Digital-to-Analog Converter (DAC) that controls the variable charging current to provide triangle modulation. A smaller offset current is added or subtracted for cubic modulation when the up-down counter reaches its minimum count. A frequency divider that clocks the up-down counter also clocks a Linear-Feedback Shift-Register (LFSR) to that controls pseudo-random current sources that further modulate variable current and frequency. The LFSR is clocked with the up-down counter to modulate each frequency step, or only at the minimum count to randomly modulate at the minimum frequency. Binary-weighted bits from the up-down counter to the DAC are swapped to modulate the frequency step size.

A deskew circuit for a differential signal is provided. A first common mode voltage generating circuit generates a first common mode voltage signal according to first and second differential input signals. A voltage buffer circuit is coupled to the first common mode voltage generating circuit and has an input impedance higher than a preset value, and buffers the first common mode voltage signal and the first and second differential input signals to generate a second common mode voltage signal, a third differential input signal, and a fourth differential input signal. A second common mode voltage generating circuit is coupled to the voltage buffer circuit and generates a third common mode voltage signal according to the third and fourth differential input signals. An output circuit generates a deskew output signal according to the third and fourth differential input signals and the second and third common mode voltage signals.

A deskew circuit for a differential signal is provided. A first common mode voltage generating circuit generates a first common mode voltage signal according to first and second differential input signals. A voltage buffer circuit is coupled to the first common mode voltage generating circuit and has an input impedance higher than a preset value, and buffers the first common mode voltage signal and the first and second differential input signals to generate a second common mode voltage signal, a third differential input signal, and a fourth differential input signal. A second common mode voltage generating circuit is coupled to the voltage buffer circuit and generates a third common mode voltage signal according to the third and fourth differential input signals. An output circuit generates a deskew output signal according to the third and fourth differential input signals and the second and third common mode voltage signals.

A waveform shaping circuit is configured without including a diode that is affected by temperature. The waveform shaping circuit includes: a capacitor with one end into which a differential signal Vd0 is inputted and another end connected to an output; an impedance element that has one end connected to the other end of the capacitor and another end into which a target constant voltage is applied; a switch circuit that is constructed of a series circuit with an impedance element and a switch without including a diode, has one end connected to the output, and has another end into which the target constant voltage is applied; and a switch control circuit that shifts the switch into an on state during a low voltage period in an AC component of the differential signal and shifts the switch to an off state during a high voltage period of the AC component.

Embodiments of a wideband buffer circuit and a wideband communication circuit that uses the wideband buffer circuit are disclosed. In an embodiment, the wideband buffer circuit includes first and second transistors deployed as a voltage buffer and connected to first and second input terminals, first and second parallel resistor-capacitor pairs connected to the first and second transistors, first and second cross-coupled transistors connected to the first and second parallel resistor-capacitor pairs and connected to first and second output terminals, and first and second current sources connected to the first and second cross-coupled transistors and a fixed voltage. The first transistor, the first parallel resistor-capacitor pair, the first cross-coupled transistor and the first current source are connected in series. Similarly, the second transistor, the second parallel resistor-capacitor pair, the second cross-coupled transistor and the second current source are connected in series.

Embodiments of a wideband buffer circuit and a wideband communication circuit that uses the wideband buffer circuit are disclosed. In an embodiment, the wideband buffer circuit includes first and second transistors deployed as a voltage buffer and connected to first and second input terminals, first and second parallel resistor-capacitor pairs connected to the first and second transistors, first and second cross-coupled transistors connected to the first and second parallel resistor-capacitor pairs and connected to first and second output terminals, and first and second current sources connected to the first and second cross-coupled transistors and a fixed voltage. The first transistor, the first parallel resistor-capacitor pair, the first cross-coupled transistor and the first current source are connected in series. Similarly, the second transistor, the second parallel resistor-capacitor pair, the second cross-coupled transistor and the second current source are connected in series.

Methods and apparatus configured to allow for users to intentionally interface with an external signal are provided. The methods and apparatus incorporate a randomly-generated electronic signal the behavior of which may be influenced to provide a control output. The methods and apparatus provide a temporal coherence measure influenced by a user that improves the ability to discriminate between intentionality and non-intentionality, and allow for the control of switching, communication, feedback and mechanical movement.

Methods and apparatus configured to allow for users to intentionally interface with an external signal are provided. The methods and apparatus incorporate a randomly-generated electronic signal the behavior of which may be influenced to provide a control output. The methods and apparatus provide a temporal coherence measure influenced by a user that improves the ability to discriminate between intentionality and non-intentionality, and allow for the control of switching, communication, feedback and mechanical movement.

A waveform shaping circuit is configured without including a diode that is affected by temperature. The waveform shaping circuit includes: a capacitor with one end into which a differential signal Vd0 is inputted and another end connected to an output; an impedance element that has one end connected to the other end of the capacitor and another end into which a target constant voltage is applied; a switch circuit that is constructed of a series circuit with an impedance element and a switch without including a diode, has one end connected to the output, and has another end into which the target constant voltage is applied; and a switch control circuit that shifts the switch into an on state during a low voltage period in an AC component of the differential signal and shifts the switch to an off state during a high voltage period of the AC component.

A receiver includes a differential signal generator receiving a single-ended signal, and generating differential signals having a positive signal and a negative signal based on the single-ended signal, a reference signal, and a pair of compensation signals, a pair of charging circuits charging first and second nodes to a power level in a logic low period of a clock signal, a pair of discharging circuits discharging the first and second nodes according to a level of the positive signal and a level of the negative signal, respectively, in a logic high period of the clock signal, a comparator comparing signal levels of the first and second nodes and outputting an offset detection signal of the differential signals, and an offset compensator outputting the reference signal and the pair of compensation signals, each adjusted based on the offset detection signal, to the differential signal generator.