Patent classifications
H03K5/003
ELECTROSURGICAL GENERATOR, ELECTROSURGICAL SYSTEM, AND METHOD OF OPERATING AN ELECTROSURGICAL GENERATOR
An electrosurgical generator supplies, during operation, a high-frequency alternating current to an electrosurgical instrument for plasma cutting of body tissue. The electrosurgical generator has outputs for connecting an electrosurgical instrument to supply an electrosurgical instrument connected to the outputs with a high-frequency alternating current, and for determining the impedance of a load connected to the outputs. The electrosurgical generator features impedance and voltage measuring units as well as an output voltage control unit. The output voltage control unit is designed to control the AC output voltage depending on a maximum output voltage value that is set during operation depending on an output value of the impedance measuring unit and/or depending on an output value of the voltage measuring unit, such that the maximum output voltage value predefines a lower AC output voltage during a vaporization phase than during an ignition phase occurring subsequently to the vaporization phase.
Method for treating liquids with alternating electromagnetic field
A method of processing a liquid by an alternating electromagnetic field includes: generating DC pulses by a pulse generator; and applying the DC pulses to a parallel oscillating circuit connected in parallel to the pulse generator. The parallel oscillating circuit includes an inductor connected in parallel to a capacitor. In response to the DC pulses, self-oscillations arise in the parallel oscillating circuit, the self-oscillations producing an alternating current in the inductor; and the inductor generates the alternating electromagnetic field for processing the liquid.
Method for treating liquids with alternating electromagnetic field
A method of processing a liquid by an alternating electromagnetic field includes: generating DC pulses by a pulse generator; and applying the DC pulses to a parallel oscillating circuit connected in parallel to the pulse generator. The parallel oscillating circuit includes an inductor connected in parallel to a capacitor. In response to the DC pulses, self-oscillations arise in the parallel oscillating circuit, the self-oscillations producing an alternating current in the inductor; and the inductor generates the alternating electromagnetic field for processing the liquid.
Differential current sensing with robust path, voltage offset removal and process, voltage, temperature (PVT) tolerance
Aspects of the disclosure are directed to voltage-based current sensing. In accordance with one aspect, voltage-based current sensing may include performing a coarse calibration of a voltage based current sensor to determine a coarse offset; performing a fine calibration of the voltage based current sensor to determine a fine offset; performing a frequency calibration of the voltage based current sensor to determine a frequency offset; and performing a transfer function calibration of the voltage based current sensor to determine a sensor transfer function using one or more of the coarse offset, the fine offset and the frequency offset; and measuring a load current using the sensor transfer function.
Differential current sensing with robust path, voltage offset removal and process, voltage, temperature (PVT) tolerance
Aspects of the disclosure are directed to voltage-based current sensing. In accordance with one aspect, voltage-based current sensing may include performing a coarse calibration of a voltage based current sensor to determine a coarse offset; performing a fine calibration of the voltage based current sensor to determine a fine offset; performing a frequency calibration of the voltage based current sensor to determine a frequency offset; and performing a transfer function calibration of the voltage based current sensor to determine a sensor transfer function using one or more of the coarse offset, the fine offset and the frequency offset; and measuring a load current using the sensor transfer function.
DEVICE AND METHOD FOR GENERATING MAGNITUDE AND RATE OFFSETS AT A PHASE COMPARATOR
Example implementations include a method of obtaining an input voltage of a power converter circuit and a system voltage of the power converter circuit, obtaining a voltage rate gain based on an aggregate inductance of the power converter circuit, and in accordance with a determination that the input voltage and the system voltage are not equal, generating a rate offset voltage based on the voltage rate gain and the system voltage difference. Example implementations also include a device with a rate predictor device operatively coupled to an input voltage node and a system voltage node, and configured to obtain an input voltage of a power converter circuit and a system voltage of the power converter circuit, configured to obtain a voltage rate gain based on an aggregate inductance of the power converter circuit, and configured to, in accordance with a determination that the input voltage and the system voltage are not equal, generate a rate offset voltage based on the voltage rate gain and the system voltage difference.
DEVICE AND METHOD FOR GENERATING MAGNITUDE AND RATE OFFSETS AT A PHASE COMPARATOR
Example implementations include a method of obtaining an input voltage of a power converter circuit and a system voltage of the power converter circuit, obtaining a voltage rate gain based on an aggregate inductance of the power converter circuit, and in accordance with a determination that the input voltage and the system voltage are not equal, generating a rate offset voltage based on the voltage rate gain and the system voltage difference. Example implementations also include a device with a rate predictor device operatively coupled to an input voltage node and a system voltage node, and configured to obtain an input voltage of a power converter circuit and a system voltage of the power converter circuit, configured to obtain a voltage rate gain based on an aggregate inductance of the power converter circuit, and configured to, in accordance with a determination that the input voltage and the system voltage are not equal, generate a rate offset voltage based on the voltage rate gain and the system voltage difference.
Clock signal generation circuit
A clock signal generation circuit for a switched capacitor circuit with a chopping function unit includes: first and second synchronous clock circuits that generate first and second synchronous clock signals, respectively; an edge signal generation circuit that generates one or more rise and fall edge signals by delaying the first synchronous clock signal; a first clock generator that generate a first clock signal group for driving the switched capacitor circuit; and a second clock generator that generates a second clock signal group for driving the chopping function unit. Frequencies of the first and second clock signal groups are respectively defined by the first and second synchronous clock circuits. Rise and fall edges of the first and second clock signal groups are defined by the edge signal generation circuit.
Clock signal generation circuit
A clock signal generation circuit for a switched capacitor circuit with a chopping function unit includes: first and second synchronous clock circuits that generate first and second synchronous clock signals, respectively; an edge signal generation circuit that generates one or more rise and fall edge signals by delaying the first synchronous clock signal; a first clock generator that generate a first clock signal group for driving the switched capacitor circuit; and a second clock generator that generates a second clock signal group for driving the chopping function unit. Frequencies of the first and second clock signal groups are respectively defined by the first and second synchronous clock circuits. Rise and fall edges of the first and second clock signal groups are defined by the edge signal generation circuit.
DC-coupled high-voltage level shifter
Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion (e.g. DC/DC) and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. According to an aspect, timing control of edges of a control signal to the high voltage semiconductor devices is provided by a basic edge delay circuit that includes a transistor, a current source and a capacitor. An inverter can be selectively coupled, via a switch, to an input and/or an output of the basic edge delay circuit to allow for timing control of a rising edge or a falling edge of the control signal.