Disclosed is an integrated circuit having a trim function for an embedded analog component or digital component. The integrated circuit includes a trim value generator configured to provide a varying trim value, a measurement target selected from a digital component and an analog component and configured to provide a measured value as a result of an internal operation corresponding to the trim value, a determination unit configured to determine the measured value based on a reference value received from the outside and to provide a trim control signal when the measured value corresponds to a preset target value, and a storage configured to store a current trim value as a measured result value in response to the trim control signal.

A device for locating a sample read with respect to a reference genome includes a plurality of groups of cells. Each group of cells stores a reference sequence representing reference bases from the reference genome corresponding to an order of cells in the respective group of cells. Each group of cells further stores a current substring sequence representing sample bases from the sample read corresponding to the order of the cells in the respective group of cells. Each group of cells stores the same current substring sequence and a reference sequence representing a portion of the reference genome that partially overlaps at least one other portion of the reference genome represented by one or more other reference sequences stored in one or more other groups of cells. Groups of cells are identified among the plurality of groups of cells where the stored reference sequence matches the current substring sequence.

Various embodiments may provide a comparator circuit arrangement. The comparator circuit arrangement may include a preamplifier having a first input configured to be coupled to a first input voltage, a second input configured to be coupled to a second input voltage, and an output configured to generate a preamplifier output signal based on the first input voltage and the second input voltage. The comparator circuit arrangement may also include a switch circuit arrangement coupled to the preamplifier, the switch circuit arrangement configured to deactivate the preamplifier upon the second input voltage exceeding the first input voltage and further configured to activate the preamplifier upon a fall of the second input voltage, and a pull-up circuit arrangement coupled to the output of the preamplifier, the pull-up circuit arrangement configured to provide a boost voltage to the preamplifier output signal for a predetermined duration upon the fall of the second input voltage.

A serial bus buffer circuit includes a master input-output terminal, a slave input-output terminal, a switched resistor circuit, and a switch control circuit. The switched resistor circuit is configured to provide a low impedance connection between the master input-output terminal and the slave input-output terminal. The switch control circuit is coupled to the switched resistor circuit, and is configured to enable the low impedance connection based on voltage at the master input-output terminal and voltage at the slave input-output terminal.

A serial bus buffer circuit includes a master input-output terminal, a slave input-output terminal, a switched resistor circuit, and a switch control circuit. The switched resistor circuit is configured to provide a low impedance connection between the master input-output terminal and the slave input-output terminal. The switch control circuit is coupled to the switched resistor circuit, and is configured to enable the low impedance connection based on voltage at the master input-output terminal and voltage at the slave input-output terminal.

Disclosed is an integrated circuit having a trim function for an embedded analog component or digital component. The integrated circuit includes a trim value generator configured to provide a varying trim value, a measurement target selected from a digital component and an analog component and configured to provide a measured value as a result of an internal operation corresponding to the trim value, a determination unit configured to determine the measured value based on a reference value received from the outside and to provide a trim control signal when the measured value corresponds to a preset target value, and a storage configured to store a current trim value as a measured result value in response to the trim control signal.

A monitoring system (10) for monitoring a supply voltage (76) for an electronic component (14) is described, comprising a voltage monitoring unit (16), which is configured to monitor a voltage level (78) assigned to a supply voltage (76) applied to the electronic component (14), and a switching unit (18) which is configured to switch the electronic component (14) on and/or off. The switching unit (18) is coupled with the voltage monitoring unit (16). The switching unit (18) is furthermore configured to switch off the electronic component (14) if the voltage monitoring unit (16) determines that the voltage level (76) is below a predetermined threshold value (80). A mains monitoring circuit (22) is furthermore described.

A monitoring system (10) for monitoring a supply voltage (76) for an electronic component (14) is described, comprising a voltage monitoring unit (16), which is configured to monitor a voltage level (78) assigned to a supply voltage (76) applied to the electronic component (14), and a switching unit (18) which is configured to switch the electronic component (14) on and/or off. The switching unit (18) is coupled with the voltage monitoring unit (16). The switching unit (18) is furthermore configured to switch off the electronic component (14) if the voltage monitoring unit (16) determines that the voltage level (76) is below a predetermined threshold value (80). A mains monitoring circuit (22) is furthermore described.

A circuit that includes an input stage circuit and an output stage circuit is provided. The input stage circuit includes a differential pair circuit and two output current mirror circuits. The differential pair circuit operates according to a first voltage source to receive a first and a second input voltages and generate a first and a second output currents. The two output current mirror circuits operate according to a second voltage source to generate a first current mirror output current fed to an input stage output node according to the first output current and generate a second current mirror output current flowed from the input stage output node according to the second output current. The output stage circuit operates according to the second voltage source to receive an input voltage from the input stage output node to generate an output voltage.

The present invention discloses a hysteresis comparator comprising an input stage, a hysteresis current generating circuit and an output stage. In the operation of the hysteresis comparator, the input stage is configured to receive a pair of differential input signals to generate at least one differential current signal; the hysteresis current generating circuit is configured to generate at least one hysteresis current to adjust the differential current signal to generate an adjusted differential current signal, wherein the hysteresis current generating circuit includes a common mode voltage detecting circuit for detecting a common mode voltage of the differential input signal for generating the hysteresis current; and the output stage is configured to generate an output signal according to the adjusted differential current signal.