Patent classifications
H03K7/02
PAM4 signal generation apparatus
A PAM4 signal generation apparatus is provided. The PAM4 signal generation apparatus includes a DFB, two EA modulators, an SOA, a PSR, a direct-current power source, two electrical-signal generators, and two amplitude-limiting amplifiers. The two electrical-signal generators and the two amplitude-limiting amplifiers are used to generate two NRZ electrical signals respectively, the DFB outputs two optical signals, the SOA amplifies an optical power of one of the optical signals, the two EA modulators use the NRZ electrical signals and the optical signals including a large signal and a small signal respectively to generate two NRZ optical signals respectively, and the two NRZ optical signals are multiplexed by the PSR to generate a PAM4 electrical signal. According to this apparatus, a linearity requirement is greatly lowered. PAM4 modulation is performed in an optical domain, and this prevents a PAM4 signal from being generated on an electrical signal.
CODING FOR PULSE AMPLITUDE MODULATION WITH AN ODD NUMBER OF OUTPUT LEVELS
The present disclosure describes embodiments of driver circuit. The driver circuit includes a first impedance element electrically coupled to a first inverter circuit and a second impedance element electrically coupled to the first impedance element and a second inverter circuit. For a first encoding using the driver circuit, the first inverter circuit and the second inverter circuit are controlled such that a first current flows through the first and second impedance elements, the first current having a first value and a first direction. For a second encoding using the driver circuit, the first inverter circuit and the second inverter circuit are controlled such that a second current flows through the first and second impedance elements, the second current having a second value and a second direction. The first value is substantially the same as the second value and the first direction is opposite to the second direction.
CODING FOR PULSE AMPLITUDE MODULATION WITH AN ODD NUMBER OF OUTPUT LEVELS
The present disclosure describes embodiments of driver circuit. The driver circuit includes a first impedance element electrically coupled to a first inverter circuit and a second impedance element electrically coupled to the first impedance element and a second inverter circuit. For a first encoding using the driver circuit, the first inverter circuit and the second inverter circuit are controlled such that a first current flows through the first and second impedance elements, the first current having a first value and a first direction. For a second encoding using the driver circuit, the first inverter circuit and the second inverter circuit are controlled such that a second current flows through the first and second impedance elements, the second current having a second value and a second direction. The first value is substantially the same as the second value and the first direction is opposite to the second direction.
PAM4 SIGNAL GENERATION APPARATUS
A PAM4 signal generation apparatus is provided. The PAM4 signal generation apparatus includes a DFB, two EA modulators, an SOA, a PSR, a direct-current power source, two electrical-signal generators, and two amplitude-limiting amplifiers. The two electrical-signal generators and the two amplitude-limiting amplifiers are used to generate two NRZ electrical signals respectively, the DFB outputs two optical signals, the SOA amplifies an optical power of one of the optical signals, the two EA modulators use the NRZ electrical signals and the optical signals including a large signal and a small signal respectively to generate two NRZ optical signals respectively, and the two NRZ optical signals are multiplexed by the PSR to generate a PAM4 electrical signal. According to this apparatus, a linearity requirement is greatly lowered. PAM4 modulation is performed in an optical domain, and this prevents a PAM4 signal from being generated on an electrical signal.
PAM4 SIGNAL GENERATION APPARATUS
A PAM4 signal generation apparatus is provided. The PAM4 signal generation apparatus includes a DFB, two EA modulators, an SOA, a PSR, a direct-current power source, two electrical-signal generators, and two amplitude-limiting amplifiers. The two electrical-signal generators and the two amplitude-limiting amplifiers are used to generate two NRZ electrical signals respectively, the DFB outputs two optical signals, the SOA amplifies an optical power of one of the optical signals, the two EA modulators use the NRZ electrical signals and the optical signals including a large signal and a small signal respectively to generate two NRZ optical signals respectively, and the two NRZ optical signals are multiplexed by the PSR to generate a PAM4 electrical signal. According to this apparatus, a linearity requirement is greatly lowered. PAM4 modulation is performed in an optical domain, and this prevents a PAM4 signal from being generated on an electrical signal.
PULSE-AMPLITUDE MODULATED HYBRID COMPARATOR CIRCUIT
Some embodiments include apparatus and methods using a first latch to receive an input signal at a gate of a transistor of the first latch and compare the input signal with a reference signal to provide a first output signal at an output node of the first latch, and a second latch coupled to the output node of the first latch, the second latch including a complementary metal-oxide semiconductor (CMOS) inverter to generate a second output signal at an output node of the second latch based on the first output signal. The second output signal has a signal swing greater than a signal swing of the first output signal.
PULSE-AMPLITUDE MODULATED HYBRID COMPARATOR CIRCUIT
Some embodiments include apparatus and methods using a first latch to receive an input signal at a gate of a transistor of the first latch and compare the input signal with a reference signal to provide a first output signal at an output node of the first latch, and a second latch coupled to the output node of the first latch, the second latch including a complementary metal-oxide semiconductor (CMOS) inverter to generate a second output signal at an output node of the second latch based on the first output signal. The second output signal has a signal swing greater than a signal swing of the first output signal.
Driver circuit for a passive resonant circuit, and transmitter device
A driver circuit for driving a passive resonant antenna-circuit, the latter comprising an inductance (L) and a capacitance (C) in parallel. The driver circuit comprises a first and a second interface node (Ni1, Ni2) connectable to the resonant antenna circuit, and comprises control circuitry for monitoring an oscillating voltage signal (Vosc) provided by the resonant antenna circuit, and for extracting timing information and amplitude information of said oscillating voltage signal (Vosc), and excitation circuitry for generating an excitation signal based on the measured timing and amplitude information, and for applying the excitation signal to the antenna circuit.
Driver circuit for a passive resonant circuit, and transmitter device
A driver circuit for driving a passive resonant antenna-circuit, the latter comprising an inductance (L) and a capacitance (C) in parallel. The driver circuit comprises a first and a second interface node (Ni1, Ni2) connectable to the resonant antenna circuit, and comprises control circuitry for monitoring an oscillating voltage signal (Vosc) provided by the resonant antenna circuit, and for extracting timing information and amplitude information of said oscillating voltage signal (Vosc), and excitation circuitry for generating an excitation signal based on the measured timing and amplitude information, and for applying the excitation signal to the antenna circuit.
Voltage supply unit and display device having the same
A voltage supply unit and a display device including the voltage supply unit are provided. The voltage supply unit includes a first voltage input terminal to which a first voltage as a DC voltage is input; a second voltage input terminal to which a second voltage as an AC voltage is input; a first capacitor between a first node and the second voltage input terminal; and a current control circuit between the first voltage input terminal and the first node and controlling a current value flowing from the first voltage input terminal to the first node so as to be equal to or less than a current limit value.