A receiver serial data streams generates a local timing reference clock from an approximate frequency reference clock by phase-aligning the local clock to transitions in the data stream. This process is commonly known as clock and data recovery (CDR). Certain transitions of the data signals are selected for use in phase-aligning the local clock, and certain transitions are ignored. Phase-error signals from multiple receivers receiving the multiple serial data streams are combined and used to make common phase adjustments to the frequency reference clock. These common adjustments track jitter that is common to the received data streams. Local adjustments that better align each respective local clock to the transitions of its respective serial data stream are made using a local phase-error signal. These local adjustments track jitter that is more unique to each of the respective serial data streams.

A receiver serial data streams generates a local timing reference clock from an approximate frequency reference clock by phase-aligning the local clock to transitions in the data stream. This process is commonly known as clock and data recovery (CDR). Certain transitions of the data signals are selected for use in phase-aligning the local clock, and certain transitions are ignored. Phase-error signals from multiple receivers receiving the multiple serial data streams are combined and used to make common phase adjustments to the frequency reference clock. These common adjustments track jitter that is common to the received data streams. Local adjustments that better align each respective local clock to the transitions of its respective serial data stream are made using a local phase-error signal. These local adjustments track jitter that is more unique to each of the respective serial data streams.

Provided is a pulse area modulation apparatus including: a register configured to receive and store PCM data having n+m bits per a sample; an amplitude shaping unit configured to shape an amplitude of an output pulse to correspond to the n bits; a duration forming unit configured to form duration of the output pulse to correspond to the m bits; and a charge accumulation means providing an output pulse, wherein a pulse area of the output pulse defined by the amplitude and the duration is modulated according to the sample.

Provided is a pulse area modulation apparatus including: a register configured to receive and store PCM data having n+m bits per a sample; an amplitude shaping unit configured to shape an amplitude of an output pulse to correspond to the n bits; a duration forming unit configured to form duration of the output pulse to correspond to the m bits; and a charge accumulation means providing an output pulse, wherein a pulse area of the output pulse defined by the amplitude and the duration is modulated according to the sample.

In a PAM-N receiver, sampler reference levels, DC offset and AFE gain may be jointly adapted to achieve optimal or near-optimal boundaries for the symbol decisions of the PAM-N signal. For reference level adaptation, the hamming distances between two consecutive data samples and their in-between edge sample are evaluated. Reference levels for symbol decisions are adjusted accordingly such that on a data transition, an edge sample has on average, equal hamming distance to its adjacent data samples. DC offset may be compensated to ensure detectable data transitions for reference level adaptation. AFE gains may be jointly adapted with sampler reference levels such that the difference between a reference level and a pre-determined target voltage is minimized

A converter includes: a terminal that receives code-modulated power into which first alternating-current power has been code-modulated with a modulation code; and a circuit that converts the code-modulated power with a conversion code to generate second alternating-current power. The conversion code is based on the modulation code. A frequency of the second alternating-current power is lower than a frequency of the first alternating-current power.

A converter includes: a terminal that receives code-modulated power into which first alternating-current power has been code-modulated with a modulation code; and a circuit that converts the code-modulated power with a conversion code to generate second alternating-current power. The conversion code is based on the modulation code. A frequency of the second alternating-current power is lower than a frequency of the first alternating-current power.

An amplitude adjustment circuit includes a memory that stores correspondence information between frequency distributions of an amplitude and adjustment coefficients, a processor configured to generate a frequency distribution of amplitude of data for which adaptive equalization processing has been executed, acquire the correspondence information between frequency distributions of the amplitude and adjustment coefficients from the memory, select the adjustment coefficient based on a result of comparison between the frequency distributions included in the correspondence information acquired by the acquiring unit and the frequency distribution generated by the generating unit, and adjust a gain of the data based on the adjustment coefficient selected by the selecting unit.

An amplitude adjustment circuit includes a memory that stores correspondence information between frequency distributions of an amplitude and adjustment coefficients, a processor configured to generate a frequency distribution of amplitude of data for which adaptive equalization processing has been executed, acquire the correspondence information between frequency distributions of the amplitude and adjustment coefficients from the memory, select the adjustment coefficient based on a result of comparison between the frequency distributions included in the correspondence information acquired by the acquiring unit and the frequency distribution generated by the generating unit, and adjust a gain of the data based on the adjustment coefficient selected by the selecting unit.

These various embodiments serve to facilitate interlaced amplitude pulsing using a hard-tube type pulse generator having at least one energy-storage unit each comprising at least one energy-storing capacitor. Generally speaking, this comprises controlling an amount of energy withdrawn from the energy-storage unit and provided to an output load to form productive electric pulses by controlling at least one of: (1) energy replenishment; and (2) non-productive energy withdrawal of the energy-storage unit, to thereby achieve a series of productive interlaced amplitude electric pulses.