Methods and apparatus are described for time domain signals. An apparatus includes an electrical circuit decoder coupled to a receiver.

A circuit for evaluating measurement signals of at least one sensor with a control circuit. A control signal having a first frequency is generated by a control section of the control circuit and the control signal is applied to the sensor. An electronic evaluation unit is provided for generating an evaluation signal originating from a measurement signal generated by the sensor. The electronic evaluation unit generates an opposing signal having the first frequency and a modifiable phase angle and superposes the opposing signal and the evaluation signal. The signal resulting from the superposition of the opposing signal and the evaluation signal is fed to a synchronous demodulator of the electronic evaluation unit.

A device, such as a heated seat cushion device, is provided. Circuitry and other components are used to regulate, control and/or switch electrical power to an electrical element, such as a heating element, of the device. The device may regulate the energy delivered to the electrical element by a processor on an intelligent energy management platform. Accordingly, power may be routed to the electrical element of the heated device in a controlled manner. Control may include turning on and off the power, providing pulsed power, and modulating the power and/or pulsed power delivered to the electrical element.

A device, such as a heated seat cushion device, is provided. Circuitry and other components are used to regulate, control and/or switch electrical power to an electrical element, such as a heating element, of the device. The device may regulate the energy delivered to the electrical element by a processor on an intelligent energy management platform. Accordingly, power may be routed to the electrical element of the heated device in a controlled manner. Control may include turning on and off the power, providing pulsed power, and modulating the power and/or pulsed power delivered to the electrical element.

The present invention relates to a system and a method for pulse width modulation and demodulation of a continuous input signal, which system is configured to receive a continuous input to an analog modulator, which system comprises a demodulator generating a continuous output signal. It is the object of the pending patent application to use an analog modulator for transmitting the signal from the input stage over to an output stage. A further object of the pending patent application is to preserve the signal integrity in regard to precision and to minimize both non-linearities and distortion side effects. The object can be fulfilled by the analog modulator being formed as a composite phase modulator which composite phase modulator comprises at least one feedback loop which feedback loop determines the width of a low-level discrete signal, which composite phase modulator comprises at least one feed-forward loop, which feed-forward loop determines the width of a high-level discrete signal as a function of the continuous input. Hereby it can be achieved that timing between discrete low-level and high-level forms a discontinuous output signal representing the continuous input.

The present invention relates to a system and a method for pulse width modulation and demodulation of a continuous input signal, which system is configured to receive a continuous input to an analog modulator, which system comprises a demodulator generating a continuous output signal. It is the object of the pending patent application to use an analog modulator for transmitting the signal from the input stage over to an output stage. A further object of the pending patent application is to preserve the signal integrity in regard to precision and to minimize both non-linearities and distortion side effects. The object can be fulfilled by the analog modulator being formed as a composite phase modulator which composite phase modulator comprises at least one feedback loop which feedback loop determines the width of a low-level discrete signal, which composite phase modulator comprises at least one feed-forward loop, which feed-forward loop determines the width of a high-level discrete signal as a function of the continuous input. Hereby it can be achieved that timing between discrete low-level and high-level forms a discontinuous output signal representing the continuous input.

Systems and methods for digital signal processing are provided. A method includes mapping a symbol in a pulse sequence by using a pulse width and a pulse start in the symbol, reading a message using a symbol value for each symbol in a string of symbols, and modifying a drilling configuration according to the message. A device configured to perform the above method is also provided.

The present invention provides a receiver including a sampling circuit, a data sampling point selection circuit and a determination circuit. The sampling circuit is configured to use a clock signal to sample an input signal to generate a sampled signal, wherein a frequency of the clock signal is greater than a frequency of the input signal. The data sampling point selection circuit is configured to filter start point data to generate a filtered start point data, and to generate a data sampling point by adding an offset to the filtered start point data, wherein the start point data corresponds to a time point that a sampled value of sampled signal starts to change. The determination circuit is configured to refer to a sampled value corresponding to the data sampling point in the sampled signal to determine a logical value of a digital output signal corresponding to the input signal.

Receiver circuitry to convert a pulse-width-modulated (PWM) signal into a digital data signal includes analog-to-digital converter circuitry that converts the PWM signal into an intermediate signal, a timing generator that derives control signals from the intermediate signal, analog charge storage circuitry that is charged and discharged according to the control signals, and circuitry that derives a digital output signal from an analog waveform output by the charge storage circuitry. The charge storage circuitry includes a capacitance and a current-limiting element, one of which is variable to control a time constant of the charge storage circuitry for calibration to a data rate of the PWM signal. A control signal may be single-ended and compared to a threshold, or may be differential with the legs compared to each other. The output is derived on a falling clock edge, and maintained until a subsequent falling clock edge.

A circuit for decoding a pulse width modulated (PWM) signal generates an output signal switching between a first and second logic values as a function of a duty-cycle of the PWM signal. Current generating circuitry receives the PWM signal and injects a current to and sinks a current from an intermediate node as a function of the values of the PWM signal. A capacitor coupled to the intermediate node is alternatively charged and discharged by the injected and sunk currents, respectively, to generate a voltage. A comparator circuit coupled to the intermediate node compares the generated voltage to a comparison voltage and drives the logic values of the output signal as a function of the comparison.