An apparatus includes a first circuit and a second circuit. The first circuit may be configured to inject charge into an I-region of a PIN diode in response to a first state of a control signal. The second circuit may be configured to remove charge from the I-region of the PIN diode in response to a second state of the control signal. A radio frequency switching time of the apparatus is generally about two orders of magnitude lower than a carrier lifetime of the PIN diode.

A driver circuit is provided. The driver circuit includes a differential driver, a first feedback passive circuit and a second feedback passive circuit. The differential driver includes a first half circuit and a second half circuit. The first half circuit has a first input point and a first output point. The second half circuit has a second input point and a second output point. The first feedback passive circuit is coupled to the second input point and the first output point. The second feedback passive circuit is coupled to the first input point and the second output point.

A driver circuit is provided. The driver circuit includes a differential driver, a first feedback passive circuit and a second feedback passive circuit. The differential driver includes a first half circuit and a second half circuit. The first half circuit has a first input point and a first output point. The second half circuit has a second input point and a second output point. The first feedback passive circuit is coupled to the second input point and the first output point. The second feedback passive circuit is coupled to the first input point and the second output point.

A driving device is provided, which drives on/off a main switching element to which a diode is anti-parallel connected, wherein the driving device includes a detection unit configured to detect a voltage between a drain terminal and a source terminal; a determination unit configured to output a determination signal indicating whether a free wheeling current is flowing from the source terminal to the drain terminal based on a detected voltage detected by the detection unit; and a drive control unit configured to perform control such that the main switching element is set in an on-state on condition that an on command signal for turning on the main switching element is input and on condition that the determination signal indicating that the free wheeling current is flowing is output.

An apparatus includes a first circuit and a second circuit. The first circuit may be configured to inject charge into an I-region of a PIN diode in response to a first state of a control signal. The second circuit may be configured to remove charge from the I-region of the PIN diode in response to a second state of the control signal. A radio frequency switching time of the apparatus is generally about two orders of magnitude lower than a carrier lifetime of the PIN diode.

Embodiments of the invention provide IGBT circuit modules with increased efficiencies. These efficiencies can be realized in a number of ways. In some embodiments, the gate resistance and/or voltage can be minimized. In some embodiments, the IGBT circuit module can be switched using an isolated receiver such as a fiber optic receiver. In some embodiments, a single driver can drive a single IGBT. And in some embodiments, a current bypass circuit can be included. Various other embodiments of the invention are disclosed.

A vehicle includes an electric machine configured to provide propulsive force to the vehicle, and a power inverter configured to supply power from a traction battery to the electric machine using a first and second switch configured as a half-bridge, wherein the first switch is controlled by a gate driver. The gate driver is configured to operate in a soft turn-off mode when a load current exceeds a threshold for a time period defined by a mask timer, operate in a fast turn-off mode when the load current is below the threshold, and in response to a turn-off request received prior to expiration of the mask timer after the load current exceeds the threshold, enable the soft turn-off mode.

An insulating gate semiconductor device includes an insulating gate semiconductor element, an insulating circuit board, and a main-current path member. A main-current of the insulating gate semiconductor element flows toward a first external terminal in the main-current path member; and a gate-current path member, being patterned so as to have a linearly extending portion arranged in parallel to a linearly extending portion of the main-current path member in a planar pattern on the insulating circuit board, being provided to connect between a second external terminal and a gate electrode of the insulating gate semiconductor element. A current which is induced in the gate-current path member by mutual induction caused by a change in magnetic field implemented by the main-current is used for increasing the gate-current in a turn-on period of the insulating gate semiconductor element.

A gate-drive controller for a power semiconductor device includes a master control unit (MCU) and one or more comparators that compare the output signal of the power semiconductor device to a reference value generated by the MCU. The MCU, in response to a turn-off trigger signal, generates a first intermediate drive signal for the power semiconductor device and generates a second intermediate drive signal, different from the first drive signal, when a DSAT signal indicates that the power semiconductor device is experiencing de-saturation. The MCU generates a final drive signal for the power semiconductor when the output signal of the one or more comparators indicates that the output signal of the power semiconductor device has changed relative to the reference value. The controller may also include a timer that causes the drive signals to change in predetermined intervals when the one or more comparators do not indicate a change.

It is an object to provide a display device which can favorably display a image without delayed or distorted signals. The display device includes a first gate driver and a second gate driver. The first gate driver and the second gate driver each include a plurality of flip flop circuits and a plurality of transfer signal generation circuits. Both the flip flop circuit and the transfer signal generation circuit are circuits which output a signal inputted to a first input terminal with a half clock cycle delay. In addition, an output terminal of the transfer signal generation circuit is directly connected to a first input terminal of the flip flop circuit in the next stage. Therefore, delay and distortion of the signal which is inputted from the transfer signal generation circuit to the flip flop circuit can be reduced.