A semiconductor module including a semiconductor element, a controller, a cooler, and a temperature sensor are included. The controller is connected to the semiconductor module and controls switching operation of the semiconductor element. The temperature sensor measures a coolant temperature, which is a temperature of the coolant. The controller controls turn-off speed of the semiconductor element based on the coolant temperature. The controller increases the turn-off speed as the coolant temperature rises.

A semiconductor module including a semiconductor element, a controller, a cooler, and a temperature sensor are included. The controller is connected to the semiconductor module and controls switching operation of the semiconductor element. The temperature sensor measures a coolant temperature, which is a temperature of the coolant. The controller controls turn-off speed of the semiconductor element based on the coolant temperature. The controller increases the turn-off speed as the coolant temperature rises.

In a drive circuit, a rate adjuster adjusts a charging speed of a MOSFET to be faster than the charging speed of an IGBT when a drive state changer changes the first switching element from the off state to the on state first, and changes the second switching element from the off state to the on state next. The rate adjuster also adjusts a discharging speed of the MOSFET to be faster than the discharging speed of the IGBT when the drive state changer changes the MOSFET from the on state to the off state first, and changes the IGBT from the on state to the off state next.

A load switch includes a switch element and first and second control circuits. The switch element has an input terminal for receiving an input voltage, an output terminal for providing an output voltage, and a control terminal for receiving a switch signal, which turns the switch element on and off. The first control circuit is connected to the control terminal of the switch element and turns off the switch element in response to a first control signal. The second control circuit also is connected to the control terminal of the switch element and keeps the switch element turned off, after the first control circuit has turned off the switch element.

The present invention provides a control method and a control circuit for a switch circuit and a corresponding switch circuit device. The control circuit comprises: an acquiring module, configured to acquire first time; a comparing module, connected with the acquiring module and configured to compare first time with first fixed time; and an adjusting module, connected with the comparing module. The adjusting module adjusts a cycle of a turn-on signal of a first switch transistor to second fixed time when the first time is less than the first fixed time. The adjusting module adjusts the sum of second time and the first fixed time to the second fixed time to achieve spread spectrum when the first time is more than the first fixed time. The control circuit for the switch circuit provided by the present invention is used for controlling the switch circuit for spread spectrum.

The present invention provides a control method and a control circuit for a switch circuit and a corresponding switch circuit device. The control circuit comprises: an acquiring module, configured to acquire first time; a comparing module, connected with the acquiring module and configured to compare first time with first fixed time; and an adjusting module, connected with the comparing module. The adjusting module adjusts a cycle of a turn-on signal of a first switch transistor to second fixed time when the first time is less than the first fixed time. The adjusting module adjusts the sum of second time and the first fixed time to the second fixed time to achieve spread spectrum when the first time is more than the first fixed time. The control circuit for the switch circuit provided by the present invention is used for controlling the switch circuit for spread spectrum.

A fully integrated GaN driver comprising a digital logic signal inverter, a level shifter circuit, a UVLO circuit, an output buffer stage, and (optionally) a FET to be driven, all integrated in a single package. The level shifter circuit converts a ground reference 0-5 V digital signal at the input to a 0-10 V digital signal at the output. The output drive circuitry includes a high side GaN FET that is inverted compared to the low side GaN FET. The inverted high side GaN FET allows switch operation, rather than a source follower topology, thus providing a digital voltage to control the main FET being driven by the circuit.

A power stage includes a power transistor and a driver, the power transistor comprising a collector, a gate and an emitter and being configured to change over from a saturated state to an off state and vice versa in accordance with a control from the driver, the power stage comprising a resistor Rg positioned between the driver and the gate, the power stage comprising a circuit for compensating for delays that is positioned in parallel with the resistor Rg, comprising: a circuit for compensating for turn-on initialization delays, which is configured to divert the current from the resistor Rg when a saturation of the power transistor is initialized, a circuit for compensating for turn-off initialization delays, which is configured to divert the current from the resistor Rg when a switching-off of the power transistor is initialized, a circuit for compensating for delays that is configured to divert the current from the resistor Rg when the power transistor is close to the saturated state.

A semiconductor device includes: a substrate body of a first conductivity-type; a first well region of a second conductivity-type provided in the substrate body and provided with a high-side circuit; a first voltage blocking region of the second conductivity-type provided around the first well region; a contact region of the second conductivity-type provided at an upper part of the first well region or the first voltage blocking region; a second voltage blocking region of the first conductivity-type provided on an outer circumferential side of the first voltage blocking region so as to be in contact with the first voltage blocking region; a first isolation region of the first conductivity-type provided to electrically isolate, from the first well region, an opposed part of the first voltage blocking region opposed to a low-side circuit provided on an outer circumferential side of the second voltage blocking region; and a level shifter.

Universal Serial Bus (USB) protection circuits are provided. A circuit includes a plurality of first transistors connected in series between a pad and ground. The circuit also includes a plurality of second transistors connected in series between the pad and a supply voltage. The circuit further includes a control circuit that applies respective bias voltages to each one of the plurality of first transistors and to each one of the plurality of second transistors. The bias voltages are configured to: turn off the plurality of first transistors and turn off the plurality of second transistors when a pad voltage of the pad is within a nominal voltage range; sequentially turn on the plurality of first transistors when the pad voltage increases above the nominal voltage range; and sequentially turn on the plurality of second transistors when the pad voltage decreases below the nominal voltage range.