A silicon carbide (SiC) metal oxide semiconductor (MOS) power device is disclosed which includes an SiC drain semiconductor region, an SiC drift semiconductor region coupled to the SiC drain semiconductor region, an SiC base semiconductor region coupled to the SiC drift semiconductor region, an SiC source semiconductor region coupled to the SiC base semiconductor region, a source electrode coupled to the SiC source semiconductor region, a drain electrode coupled to the SiC drain semiconductor region, a gate electrode, wherein voltage of the gate electrode with respect to the SiC base semiconductor region is less than or equal to about 12 V and thickness of the dielectric material is such that the electric field in the dielectric material is about 4 MV/cm when said gate voltage is about 12 V.

A system includes an output terminal and a linear switch circuit coupled to the output terminal. The linear switch circuit includes a first power field-effect transistor (FET) having: a first channel width; a control terminal; a first current terminal; and a second current terminal, wherein the second current terminal is coupled to the output terminal. The linear switch circuit also includes a second power FET having: a second channel width smaller than the first channel width; a control terminal; a first current terminal coupled to the first current terminal of the first power FET; and a second current terminal coupled to the output terminal. The system also comprises a control circuit coupled to the control terminal of the first power FET and to the control terminal of the second power FET. The control circuit detects a drain-to-source voltage (V.sub.DS) saturation condition and controls the first and second power FETs accordingly.

An input circuit for reading in an analog input signal of a sensor comprises: first and second input ports connectable to the sensor; a first current-measuring signal converter connected to the first input port and comprising a current-measuring apparatus to determine a first output signal from the analog input signal; a current-limiting apparatus inside the first current-measuring signal converter for limiting a maximum current flowing through the first current-measuring signal converter; and a second current-measuring signal converter connected to the second input port and comprising a current-measuring apparatus to determine a second output signal from the analog input signal, wherein the first and second current-measuring signal converters are connected in series; and a testing apparatus for comparing the first and second output signals to detect faults of the first and second current-measuring signal converters in response to deviations between the first and second output signals exceeding a limit value.

An input circuit for reading in an analog input signal of a sensor comprises: first and second input ports connectable to the sensor; a first current-measuring signal converter connected to the first input port and comprising a current-measuring apparatus to determine a first output signal from the analog input signal; a current-limiting apparatus inside the first current-measuring signal converter for limiting a maximum current flowing through the first current-measuring signal converter; and a second current-measuring signal converter connected to the second input port and comprising a current-measuring apparatus to determine a second output signal from the analog input signal, wherein the first and second current-measuring signal converters are connected in series; and a testing apparatus for comparing the first and second output signals to detect faults of the first and second current-measuring signal converters in response to deviations between the first and second output signals exceeding a limit value.

A battery device includes a battery unit which has a plurality of batteries connected in series; first and second lines each led from a cathode and an anode of the battery unit; first and second semiconductor switch elements which are inserted into the first line; a driver configured to generate a drive signal to turn off one of the first and second semiconductor switch elements when a protective operation is performed; a third semiconductor switch element which is inserted between a gate of at least one of the first and second semiconductor switch elements and an intermediate voltage point of the battery unit; and a semiconductor switch controller including a detector configured to turn on the third semiconductor switch element when the drive signal is detected and to apply a potential smaller than a source potential to a gate of one of the first.

A semiconductor element drive device is provided to solve a problem that because a case of a change in the temperature of the semiconductor element or a current flowing through the semiconductor element is not take into consideration, switching loss and noise cannot be reduced sufficiently. In accordance with input sensing information (temperature T, current I), a timing control unit 3 outputs a delay signal Q to control timing of driving a current increasing circuit 5 so that a reduction of switching loss of an IGBT 101 is maximized. When the IGBT 101 is in turn-on mode or turn-off mode, the current increasing circuit 5 outputs a drive signal in response to the delay signal Q delayed by a given time from output of the drive instruction signal P. In this way, the current increasing circuit 5 increases the current that causes the gate capacitor of the IGBT 101 to be charged/discharged in response to the delay signal Q, thereby increasing a switching speed to reduce switching loss.

A semiconductor element drive device is provided to solve a problem that because a case of a change in the temperature of the semiconductor element or a current flowing through the semiconductor element is not take into consideration, switching loss and noise cannot be reduced sufficiently. In accordance with input sensing information (temperature T, current I), a timing control unit 3 outputs a delay signal Q to control timing of driving a current increasing circuit 5 so that a reduction of switching loss of an IGBT 101 is maximized. When the IGBT 101 is in turn-on mode or turn-off mode, the current increasing circuit 5 outputs a drive signal in response to the delay signal Q delayed by a given time from output of the drive instruction signal P. In this way, the current increasing circuit 5 increases the current that causes the gate capacitor of the IGBT 101 to be charged/discharged in response to the delay signal Q, thereby increasing a switching speed to reduce switching loss.

Provided is a driver circuit that controls an output unit that switches whether or not to supply a current to an output line, in accordance with a potential difference between a first control signal to be input and a voltage of the output line. The driver circuit comprises a control line that transmits the first control signal to the output unit; a low potential line to which a predetermined reference potential is applied; a first connection switching unit that switches whether or not to connect the control line and the low potential line, in accordance with a second control signal; and a cutoff unit that is provided in series with the first connection switching unit between the control line and the low potential line and cuts off the control line and the low potential line based on a potential of the low potential line.

For example, a semiconductor device includes an output electrode to be connected to an inductive load, a ground electrode to be connected to a ground terminal, first and second transistors connected in parallel between the output and ground electrodes, an active clamp circuit connected to the gate of the first transistor, and a gate control circuit to control the gates of the first and second transistors to keep the first and second transistors on in a first operation state and off in a second operation state. After a transition from the first operation state to the second, before the active clamp circuit operates, the gate control circuit short-circuits between the gate and source of the second transistor.

For example, a semiconductor device includes an output electrode to be connected to an inductive load, a ground electrode to be connected to a ground terminal, first and second transistors connected in parallel between the output and ground electrodes, an active clamp circuit connected to the gate of the first transistor, and a gate control circuit to control the gates of the first and second transistors to keep the first and second transistors on in a first operation state and off in a second operation state. After a transition from the first operation state to the second, before the active clamp circuit operates, the gate control circuit short-circuits between the gate and source of the second transistor.