An adaptive anti-aging sensor based on a cuckoo algorithm, comprising a control module, a reference voltage-controlled oscillator, two shaping circuits, a frequency difference circuit, a resolution adjustment circuit, a 16-bit counter, a parallel-to-serial circuit, an adaptive module, and a digital-to-analog converter. A lookup table is prestored in the adaptive module; when aging monitoring is performed on a voltage-controlled oscillator in an integrated circuit, the adaptive module uses the cuckoo algorithm to determines the optimal working voltage of the currently monitored voltage-controlled oscillator, and the control module accordingly changes the input voltage of the voltage-controlled oscillator of the integrated circuit. The present invention has the advantages that the degree of aging of the integrated circuit is reflected by monitoring the degree of aging of the voltage-controlled oscillator in the integrated circuit, and the optimal working voltage of the voltage-controlled oscillator in the integrated circuit is adaptively adjusted.

According to one embodiment, electronic circuitry includes: a detection circuit including a diode, a cathode side of the diode being connected to one end of a semiconductor switching element and an anode side of the diode being connected to a first node; a comparator circuit configured to compare a voltage of the first node and a threshold voltage and generate a first signal; a first filter connected between the first node and another end of the semiconductor switching element and configured to suppress the voltage of the first node in a first period based on a control signal indicating turn-on of the semiconductor switching element; and a control circuit configured to determine at least one of the threshold voltage and the first period based on the first signal.

A drive device for driving a voltage-controlled semiconductor element. The drive device includes: a drive circuit connected to the gate of the semiconductor element via a gate resistor; a delay circuit connected to the drive circuit, for delaying a drive signal output from the drive circuit until a gate voltage of the semiconductor element enters a Miller effect period, which is a period during which the gate voltage transitionally changes, the gate voltage having temperature dependency on a chip temperature of the semiconductor element; a one-shot circuit connected to the delay circuit, for outputting a pulse signal with a pulse width shorter than the Miller effect period; a comparator that compares the gate voltage with a reference voltage; and an AND circuit that outputs an overheat detection signal in response to the gate voltage exceeding the reference voltage.

A drive device for driving a voltage-controlled semiconductor element. The drive device includes: a drive circuit connected to the gate of the semiconductor element via a gate resistor; a delay circuit connected to the drive circuit, for delaying a drive signal output from the drive circuit until a gate voltage of the semiconductor element enters a Miller effect period, which is a period during which the gate voltage transitionally changes, the gate voltage having temperature dependency on a chip temperature of the semiconductor element; a one-shot circuit connected to the delay circuit, for outputting a pulse signal with a pulse width shorter than the Miller effect period; a comparator that compares the gate voltage with a reference voltage; and an AND circuit that outputs an overheat detection signal in response to the gate voltage exceeding the reference voltage.

An apparatus includes a current-based temperature compensation circuit having a reference buffer, a biasing current mirror, and a controller. The reference buffer is configured to receive a biasing reference voltage at a voltage input terminal and replicate the biasing reference voltage to first and second buffer terminals. At least one of the first and second buffer terminals is configured to be electrically connected to at least one gate terminal of an analog complementary metal oxide semiconductor (CMOS) physically unclonable function (PUF) cell. The biasing current mirror is configured to receive a reference current at a current input terminal and replicate the reference current to the first buffer terminal. The controller is configured to compensate an output of the CMOS PUF cell for temperature variation based on a weighted sum of a bandgap current, a current proportional to absolute temperature, and a current complementary to absolute temperature.

A method for protecting a system including a driver integrated circuit includes receiving a driver input signal. The method includes driving an output signal externally to the driver integrated circuit. The output signal is driven based on the driver input signal and an indication of a delay between receipt of an edge of the driver input signal and arrival of a corresponding edge of the output signal at an output node coupled to a terminal of the driver integrated circuit.

An improved circuit or method generates first and second initial pulses that do not overlap. First and second drive pulses are generated based on the first and second initial pulses, respectively. A first transistor is turned on with the first drive pulses. A second transistor is turned on with the second drive pulses. A current flows in response to an on-time state of the first transistor overlapping with an on-time state of the second transistor. A delay of the second drive pulses is decreased based on a time of the current flow overlapping with one of the first initial pulses; and the delay of the second drive pulses is increased based on the time of the current flow overlapping with one of the second initial pulses.

Embodiments relate to circuit for reversing a threshold voltage shift of a transistor. The circuit includes a current mirror for sensing a transistor current and generating a mirrored current corresponding to the sensed transistor current, a gate biasing module for providing a gate bias to the transistor, and a calibration engine configured to receive the mirrored current from the current mirror and to control the gate biasing module in response to determining whether the mirrored current is outside of a predetermined range indicative of a shift in the threshold voltage of the transistor. The gate biasing module includes a gate biasing circuit configured to operate the transistor in a region where hot carrier injection (HCI) is present, and a gate switch for coupling the gate biasing circuit to a gate terminal of the transistor.

A solid-state relay includes a semiconductor switch and a voltage boost block. The semiconductor switch has a control input, which causes the semiconductor switch to shift from an open, non-conducting position to a closed, conducting position when a voltage is applied to the control input. The voltage boost block includes a boost converter and a ground connector. A voltage output of the semiconductor switch is electrically connected to a voltage input of the boost converter. A voltage output of the boost converter is electrically connected to the control input. The ground connector of the boost converter is electrically connected to a voltage input of the semiconductor switch When the semiconductor switch is in the closed position, the semiconductor switch is maintained in a closed position in the absence of another control signal.

A semiconductor device includes: a first terminal inputting a first voltage from outside; a drive unit using the first voltage as a power supply voltage and outputting a drive signal; a switching device driven by the drive signal; a second terminal separated from the first terminal and inputting a second voltage from outside; a comparator using a voltage generated from the second voltage as a power supply voltage and outputting an output signal when a voltage generated from the first voltage is less than or equal to a reference potential; and a shut-off switch shutting off a transmission of the drive signal to the switching device from the drive unit in response to the output signal.