In a trench-gate vertical MOSFET, an n-type drift layer and p-type base layer are epitaxially grown on an n.sup.+ silicon carbide substrate, and an n.sup.++ source region and p.sup.++ contact region are provided inside the p-type base layer. The first source electrode contacts the n.sup.+ source region, and the second source electrode contacts the p.sup.++ contact region. The first source electrode and second source electrode are separated from each other.

An embodiment electronic circuit includes an electronic switch comprising a load path, and a control circuit configured to drive the electronic switch. The control circuit is configured to operate in one of at least two operation modes. The at least two operation modes comprise a first operation mode and a second operation mode. The control circuit, in the second operation mode, is configured to perform a set of basic functions and, in the first operation mode, is configured to perform the set of basic functions and at least one additional function. The at least one additional function comprises generating a first protection signal based on a current-time-characteristic of a load current of the electronic switch and driving the electronic switch based on the first protection signal.

A device can include a first circuit configured to be exposed to a first environment, the first circuit comprising one or more first transfer inductors, and a second circuit isolated from the first circuit and configured to be exposed to a second environment, the second circuit comprising one or more second transfer inductors. The second environment can be a harsh environment. The first circuit and the second circuit can be wirelessly coupled via the one or more first transfer inductors and the one or more second transfer inductors to allow transfer of power and/or signals between the first circuit and the second circuit.

An apparatus including a main transistor-based switch having a first end node and a second end node and an ON-state linearization network that is coupled between the first end node and the second end node of the main transistor-based switch is disclosed. The ON-state linearization network is configured to receive a monitored signal that corresponds to a signal across the first end node and the second end node and cancel at least a portion of non-linear distortion generated by the main transistor-based switch when the main transistor-based switch is in an ON-state based on the monitored signal. A control signal applied to a control input of the ON-state linearization network causes the ON-state linearization network to activate when the main transistor-based switch is in the ON-state and to deactivate the ON-state linearization network when the main transistor-based switch is an OFF-state.

A current compensation circuit includes a current compensator configured to measure a compensation time in which a sensing voltage generated by a driving current passing through a driving switching element drops below a first certain voltage in response to the driving switching element being turned on and configured to delay a turn-off point of the driving switching element from a point in which the sensing voltage reaches a second certain voltage during the measured compensation time and a switching controller configured to provide a switching control signal at a turn-off point of the delayed driving switching element. Such a current compensation circuit accurately controls an average driving current regardless of change of an input voltage and an output voltage and is able to use a peak current mode control method to operate a light emitting diode.

A transistor device may include an n-type transistor. The transistor device may further include a first bias voltage unit, which is electrically connected to the n-type transistor and configured to apply a first positive bias voltage to a drain terminal of the n-type transistor when the n-type transistor is in an off state. The transistor device may further include a second bias voltage unit electrically, which is connected to the n-type transistor and configured to apply a second positive bias voltage to a source terminal of the n-type transistor when the n-type transistor is in the off state.

A semiconductor module including a semiconductor element, a controller, a cooler, and a temperature sensor are included. The controller is connected to the semiconductor module and controls switching operation of the semiconductor element. The temperature sensor measures a coolant temperature, which is a temperature of the coolant. The controller controls turn-off speed of the semiconductor element based on the coolant temperature. The controller increases the turn-off speed as the coolant temperature rises.

A closed loop switch control system and a corresponding method is provided for controlling an impedance of a switch. The switch, which usually comprises a transistor switch, may be part of an external circuit. The system comprises the switch and a control unit coupled to the switch. The control unit is configured to regulate an impedance of the switch to a reference impedance while also enabling a fast switch response time. This is achieved by configuring the control unit to have a frequency response comprising a plurality of dominant poles and at least one zero.

A closed loop switch control system and a corresponding method is provided for controlling an impedance of a switch. The switch, which usually comprises a transistor switch, may be part of an external circuit. The system comprises the switch and a control unit coupled to the switch. The control unit is configured to regulate an impedance of the switch to a reference impedance while also enabling a fast switch response time. This is achieved by configuring the control unit to have a frequency response comprising a plurality of dominant poles and at least one zero.

A driver for a power field-effect transistor includes a first and second circuits that apply respective charge currents to a gate of the power field-effect transistor when a control signal has a first logic value and the voltage between the gate and the source is smaller than a first threshold voltage and greater than a second threshold voltage. Third and fourth circuits apply respective discharge currents to the gate when the control signal has a second logic value and the voltage between the gate and the source is greater than a third threshold voltage and smaller than a fourth threshold voltage. The driver may include at least one field-effect transistor configured to generate at least one of the first, second, third or fourth threshold voltage.