Systems, methods, and circuits for determining one or more switch statuses are disclosed herein. In one example embodiment, such a system includes a first port configured to be coupled to a switch, a capacitor, a comparator having first and second input ports and an output port, a current source coupled to the first input port, and a control component. The first input port is coupled to the first port and a threshold voltage if applied to the second input port. The control component is configured so that, in at least one circumstance, it causes the current source to cease driving the current in response to receiving an indication from the output port indicating that an additional voltage applied to the first input port has changed from being less than the threshold voltage to being greater than that voltage, the indication being indicative of the switch status.

A drive circuit includes an internal oscillator and a pre-drive controller coupled to the internal oscillator. The pre-drive controller can have a switch control output configured to be coupled to a switch input. The pre-drive controller can receive switch control data, receive a clock signal, receive a synchronization signal, synchronize the internal oscillator based on the clock signal and the synchronization signal, and generate a pulse modulated switching signal at the switch control output based on the switch control data and the internal oscillator.

A radiation therapy system includes an X-ray imaging system that is configured with a combined and simplified filter and collimator positioning mechanism. In addition, an X-ray imager of the RT system is only positioned at a few discrete locations within a plane that is a fixed distance from the imaging X-ray source when generating X-ray images. As a result, for each of these discrete imaging positions, the simplified filter and collimator positioning mechanism positions a specific collimator-filter combination in a specific location between the X-ray source and the imager.

A semiconductor device includes: a plurality of cores configured to receive power from a power supply; a plurality of power switch circuits provided for each core and configured to control the power supplied to the corresponding cores; a compare circuit configured to receive power from the power supply and compare output data of the plurality of cores; and a core voltage monitor circuit configured to monitor a voltage of a node that connects the power supply and the compare circuit.

A method for controlling a first and a second reverse-conducting insulated gate bipolar transistor (RC-IGBT), electrically connected in series, is disclosed. A collector of the first RC-IGBT is electrically connected to a positive pole of a direct current voltage source, and an emitter of the second RC-IGBT is electrically connected to a negative pole of the DC voltage source. Further, an emitter of the first RC-IGBT is electrically connected to a collector of the second RC-IGBT to form an alternating current terminal. A gate voltage is applied to respective gates of the first and second RC-IGBTs, wherein the gate voltage is controlled based on a magnitude and a direction of an output current on the AC terminal and on a command signal alternating between a first and a second value.

A method for controlling a first and a second reverse-conducting insulated gate bipolar transistor (RC-IGBT), electrically connected in series, is disclosed. A collector of the first RC-IGBT is electrically connected to a positive pole of a direct current voltage source, and an emitter of the second RC-IGBT is electrically connected to a negative pole of the DC voltage source. Further, an emitter of the first RC-IGBT is electrically connected to a collector of the second RC-IGBT to form an alternating current terminal. A gate voltage is applied to respective gates of the first and second RC-IGBTs, wherein the gate voltage is controlled based on a magnitude and a direction of an output current on the AC terminal and on a command signal alternating between a first and a second value.

A device for monitoring a power semiconductor switch includes a circuit section for applying to the power semiconductor switch an HF voltage having a frequency above a switching threshold of the power semiconductor switch, a shunt resistor for detecting an actual HF current resulting from application of the HF voltage to the power semiconductor switch, a monitoring circuit for comparing the actual HF current with an expected HF current that depends on a switching state of the power semiconductor switch when the HF voltage is applied to the power semiconductor switch, and a comparator for generating a power semiconductor status signal depending on a result of the comparison. A corresponding method for monitoring a power semiconductor switch of this type is also described.

A device for monitoring a power semiconductor switch includes a circuit section for applying to the power semiconductor switch an HF voltage having a frequency above a switching threshold of the power semiconductor switch, a shunt resistor for detecting an actual HF current resulting from application of the HF voltage to the power semiconductor switch, a monitoring circuit for comparing the actual HF current with an expected HF current that depends on a switching state of the power semiconductor switch when the HF voltage is applied to the power semiconductor switch, and a comparator for generating a power semiconductor status signal depending on a result of the comparison. A corresponding method for monitoring a power semiconductor switch of this type is also described.

Example methods and apparatuses of controlling a user interface with a plurality of input mechanisms are disclosed. One example method includes causing a first set of input mechanisms in the plurality of input mechanisms to be visually emphasized via a first visual technique while a second set of input mechanisms in the plurality of input mechanisms is not visually emphasized via the first visual technique, receiving a user input via an input mechanism that is included in the first set, based on the user input, determining a third set of input mechanisms in the plurality of input mechanisms and a fourth set of input mechanisms in the plurality of input mechanisms, and causing the third set of input mechanisms to be visually emphasized via the first visual technique while the fourth set of available input mechanisms is not visually emphasized via the first visual technique.

Overload detection and protection for power switch circuits. For circuits with faster switching speed, fast fault detection and response to a detected overload condition may be desirable. Detection circuitry may monitor a voltage on the control terminal of one or more power switches. Based on empirical measurements, in an overload condition of a power switch circuit, e.g., a half-bridge circuit, the voltage at the control terminal may increase, and in some examples, increase to a magnitude that is greater than a supply voltage. A comparator may detect a voltage increase that exceeds a voltage magnitude threshold, output an indication to control circuitry for the power switch circuit, and the control circuitry may take action to protect the rest of the circuitry, such as reduce voltage or shut off the power switch circuit.