H03K17/20

Current reduction for activated load

In one example, a circuit includes an input, an output, and a control module. The input is configured to receive a control signal indicating whether to activate or deactivate a load. The output is configured to supply current to activate the load. The control module is configured to determine whether a state of the circuit is a low current consumption mode (LCCM). In response to determining that the state of the circuit is not the LCCM, the control module is configured to determine whether the control signal indicates to activate the load and output, at the output, the current to activate the load. In response to determining that the state of the circuit is the LCCM, the control module is configured to ignore the control signal indicating whether to activate or deactivate the load and output, at the output, the current to activate the load.

Power semiconductor element driving circuit

A driving circuit including: a voltage detector that detects the sum voltage of a positive bias voltage and a negative bias voltage, the negative bias voltage or the positive bias voltage; and a switching element that is connected to the control terminal of a power element and the negative side of a negative-voltage power supply; wherein, when the value of the detection target voltage becomes lower than a voltage setting value or when a voltage between the control terminal and the reference terminal in the power element increases in a state where the value of the detection target voltage is lower than the voltage setting value, the voltage detector turns on the switching element to thereby supply, between the above terminals in the power element, a voltage of 0V or lower.

DIAGNOSTIC SYSTEM FOR A DC-DC VOLTAGE CONVERTER
20180149711 · 2018-05-31 ·

A diagnostic system for a DC-DC voltage converter having a high voltage switch, a low voltage switch, and a DC-DC voltage converter control circuit is provided. The system includes first and second tri-state buffer ICs and a microcontroller. The first tri-state buffer IC receives a first shutdown indicator voltage from the DC-DC voltage converter control circuit indicating that a first plurality of FET switches in a high side FET IC and a second plurality of FET switches in a low side FET IC have been transitioned to an open operational state. The first tri-state buffer IC outputs a second shutdown indicator voltage to the microcontroller that indicates that the first and second plurality of FET switches have been transitioned to the open operational state.

SEMICONDUCTOR DEVICE AND METHOD OF GENERATING POWER-ON RESET SIGNAL
20180123582 · 2018-05-03 · ·

A semiconductor device and a method of generating a power-on reset signal are provided. The semiconductor device includes a regulator configured to generate a regulated power supply voltage having a lower voltage value than a power supply voltage based on the power supply voltage and output the regulated power supply voltage to an internal power supply line, and a power-on reset circuit configured to generate a signal which has a first level at which reset is prompted immediately after power for the power supply voltage is turned on and which transitions to a second level at which reset release is prompted from the first level when a voltage value of the internal power supply line has risen as a power-on reset signal.

SEMICONDUCTOR DEVICE AND METHOD OF GENERATING POWER-ON RESET SIGNAL
20180123582 · 2018-05-03 · ·

A semiconductor device and a method of generating a power-on reset signal are provided. The semiconductor device includes a regulator configured to generate a regulated power supply voltage having a lower voltage value than a power supply voltage based on the power supply voltage and output the regulated power supply voltage to an internal power supply line, and a power-on reset circuit configured to generate a signal which has a first level at which reset is prompted immediately after power for the power supply voltage is turned on and which transitions to a second level at which reset release is prompted from the first level when a voltage value of the internal power supply line has risen as a power-on reset signal.

CURRENT REDUCTION FOR ACTIVATED LOAD
20180097398 · 2018-04-05 ·

In one example, a circuit includes an input, an output, and a control module. The input is configured to receive a control signal indicating whether to activate or deactivate a load. The output is configured to supply current to activate the load. The control module is configured to determine whether a state of the circuit is a low current consumption mode (LCCM). In response to determining that the state of the circuit is not the LCCM, the control module is configured to determine whether the control signal indicates to activate the load and output, at the output, the current to activate the load. In response to determining that the state of the circuit is the LCCM, the control module is configured to ignore the control signal indicating whether to activate or deactivate the load and output, at the output, the current to activate the load.

SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING SEMICONDUCTOR DEVICE
20180083615 · 2018-03-22 ·

A semiconductor device comprises a first transistor with a silicon carbide layer between the source and the drain electrodes and between the gate and drain electrodes. A diode is formed in the silicon carbide layer. A forward voltage of the diode varies with the voltage applied to the gate electrode of the first transistor. A second transistor is connected to the first transistor. A gate controller applies voltages to gates of the first and second transistor such that the first and second transistors are set to an off-state a first time. The first gate voltage is then increased to an intermediate voltage that is less than a threshold voltage of the first transistor. The intermediate voltage is sufficient to alter the forward voltage of the diode and permit a forward current to flow in the diode. The first gate voltage is then increased to an on-state voltage.

SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING SEMICONDUCTOR DEVICE
20180083615 · 2018-03-22 ·

A semiconductor device comprises a first transistor with a silicon carbide layer between the source and the drain electrodes and between the gate and drain electrodes. A diode is formed in the silicon carbide layer. A forward voltage of the diode varies with the voltage applied to the gate electrode of the first transistor. A second transistor is connected to the first transistor. A gate controller applies voltages to gates of the first and second transistor such that the first and second transistors are set to an off-state a first time. The first gate voltage is then increased to an intermediate voltage that is less than a threshold voltage of the first transistor. The intermediate voltage is sufficient to alter the forward voltage of the diode and permit a forward current to flow in the diode. The first gate voltage is then increased to an on-state voltage.

SEMICONDUCTOR DEVICE FOR HIGH-VOLTAGE CIRCUIT
20180019742 · 2018-01-18 · ·

Provided is a semiconductor device capable of preventing a malfunction of a high-side gate driver circuit that is caused by a negative voltage surge. A diode is connected between a p-type bulk substrate configuring a semiconductor layer, and a first potential (GND potential), and a signal is transmitted from a control circuit that is formed in an n diffusion region configuring a first semiconductor region through a first level down circuit and a first level up circuit to a high-side gate driver circuit that is formed in an n diffusion region configuring a second semiconductor region. As a result, a malfunction of the high-side gate driver circuit that is caused by a negative voltage surge can be prevented.

SEMICONDUCTOR DEVICE FOR HIGH-VOLTAGE CIRCUIT
20180019742 · 2018-01-18 · ·

Provided is a semiconductor device capable of preventing a malfunction of a high-side gate driver circuit that is caused by a negative voltage surge. A diode is connected between a p-type bulk substrate configuring a semiconductor layer, and a first potential (GND potential), and a signal is transmitted from a control circuit that is formed in an n diffusion region configuring a first semiconductor region through a first level down circuit and a first level up circuit to a high-side gate driver circuit that is formed in an n diffusion region configuring a second semiconductor region. As a result, a malfunction of the high-side gate driver circuit that is caused by a negative voltage surge can be prevented.