A dual-VIO integrated circuit is configurable into either a first configuration in which a VIO power supply voltage has a first value or into a second configuration in which the VIO power supply voltage has a second value. The dual-VIO integrated circuit includes a smart start-up detection circuit that detects whether the integrated circuit is in the first configuration or the second configuration.

Described is a battery de-passivation circuit that generally comprises a battery having a de-passivation circuit attached across its positive and negative terminals. The de-passivation circuit includes a switch that can open or close the de-passivation circuit, a resistor that can regulate the amount of current drawn from the battery and a clock and timer controller system that controls the switch. The controller system controls closing the circuit long enough to bring the passivation level build-up within the battery to an acceptable lower level and controls opening the circuit long enough to allow passivation levels to build-up to an acceptable upper level.

A microelectronic circuit comprises a plurality of logic units and register circuits arranged into a plurality of processing paths. At least one monitor circuit (404) is associated with a first register circuit (301), said monitor circuit (404) being configured to produce a timing event observation signal as a response to a change in a digital value at an input (D) of the first register circuit (301) that took place later than an allowable time limit defined by a triggering signal (CP) to said first register circuit (301). A first processing path goes through a first logic unit (501) to said first register circuit (301) and is a delay critical processing path due to an amount of delay that it is likely to generate. The microelectronic circuit comprises a controllable data event injection point (503) for controllably generating a change of a digital value propagating to said first logic unit (501) irrespective of what other data is processed on said first processing path. Said microelectronic circuit is configured to freeze a first digital value stored in said first register circuit (301) for a time during which the change generated through said controllable data event injection point (503) propagates to said first register circuit.

A microelectronic circuit comprises a plurality of logic units and register circuits arranged into a plurality of processing paths. At least one monitor circuit (404) is associated with a first register circuit (301), said monitor circuit (404) being configured to produce a timing event observation signal as a response to a change in a digital value at an input (D) of the first register circuit (301) that took place later than an allowable time limit defined by a triggering signal (CP) to said first register circuit (301). A first processing path goes through a first logic unit (501) to said first register circuit (301) and is a delay critical processing path due to an amount of delay that it is likely to generate. The microelectronic circuit comprises a controllable data event injection point (503) for controllably generating a change of a digital value propagating to said first logic unit (501) irrespective of what other data is processed on said first processing path. Said microelectronic circuit is configured to freeze a first digital value stored in said first register circuit (301) for a time during which the change generated through said controllable data event injection point (503) propagates to said first register circuit.

A plug (10) comprising a body (12) having a base portion (22) and an upper portion (24), the base portion (22) being receivable in an outlet (14) of a bath to prevent water flow. An actuator (42) is provided within the body (12) being moveable from a retracted position to an extended position. A timer is operable such that when a time period has elapsed from activation of the timer, the actuator (42) moves from the retracted to the extended position. In the extended position, the actuator (42) moves the body (12) of the plug (10) to disengage the plug (10) from the outlet (14) such that water may flow outwardly through the outlet (14).

A plug (10) comprising a body (12) having a base portion (22) and an upper portion (24), the base portion (22) being receivable in an outlet (14) of a bath to prevent water flow. An actuator (42) is provided within the body (12) being moveable from a retracted position to an extended position. A timer is operable such that when a time period has elapsed from activation of the timer, the actuator (42) moves from the retracted to the extended position. In the extended position, the actuator (42) moves the body (12) of the plug (10) to disengage the plug (10) from the outlet (14) such that water may flow outwardly through the outlet (14).

Systems, methods, and apparatus for reducing standing wave reflections between delay line modules are described. The delay line modules include semiconductor switches, particularly MOSFET switches fabricated on silicon-on-insulator (SOI) and silicon-on-sapphire (SOS) substrates and embedded attenuators. According to one aspect, a delay line module includes two switches with delay lines coupled between respective output ports of the switches. Each switch includes MOSFET switches forming conduction paths with selectable high and low impedances. According to another aspect, at least one of the conduction paths includes an attenuator block formed by one or more shunting resistors coupled to one of the MOSFET switches. The output ports of the switches can be selectively coupled to a reference ground via a shunted MOSFET switch.

Systems, methods, and apparatus for reducing standing wave reflections between delay line modules are described. The delay line modules include semiconductor switches, particularly MOSFET switches fabricated on silicon-on-insulator (SOI) and silicon-on-sapphire (SOS) substrates and embedded attenuators. According to one aspect, a delay line module includes two switches with delay lines coupled between respective output ports of the switches. Each switch includes MOSFET switches forming conduction paths with selectable high and low impedances. According to another aspect, at least one of the conduction paths includes an attenuator block formed by one or more shunting resistors coupled to one of the MOSFET switches. The output ports of the switches can be selectively coupled to a reference ground via a shunted MOSFET switch.

A semiconductor device having a semiconductor chip and a control circuit. The semiconductor chip has a gate electrode pad connected to the gate of an output element and the gate of a current monitor element, a sense emitter electrode pad connected to the sense emitter of the current monitor element and to the anode of the temperature detection diode via a current limiting element, and a cathode electrode pad that is connected to the cathode of the temperature detection diode, the cathode being grounded without being connected to the emitter of the output element. In a temperature detection mode, the control circuit receives a temperature detection voltage via the sense emitter electrode pad and detects the temperature state of the output element. In a current detection mode, the control circuit receives a sense current via the sense emitter electrode pad and detects the current state of the output element.

A semiconductor device having a semiconductor chip and a control circuit. The semiconductor chip has a gate electrode pad connected to the gate of an output element and the gate of a current monitor element, a sense emitter electrode pad connected to the sense emitter of the current monitor element and to the anode of the temperature detection diode via a current limiting element, and a cathode electrode pad that is connected to the cathode of the temperature detection diode, the cathode being grounded without being connected to the emitter of the output element. In a temperature detection mode, the control circuit receives a temperature detection voltage via the sense emitter electrode pad and detects the temperature state of the output element. In a current detection mode, the control circuit receives a sense current via the sense emitter electrode pad and detects the current state of the output element.