A switching valve includes series-connected switching elements and auxiliary circuits. Each auxiliary circuit is connected in parallel with a respective one of the series-connected switching elements. Each auxiliary circuit includes a respective auxiliary capacitor. The method includes carrying out a compensation procedure. The compensation procedure includes: initiating a turn-off event by sending a respective turn-off control signal to each switching element; measuring a respective capacitor voltage value of each auxiliary capacitor after the turn-off event; comparing the measured capacitor voltage values; and using the comparison between the measured capacitor voltages as a reference to adjust the time of sending a or a respective turn-off control signal to at least one of the switching elements so as to reduce a or a respective time difference between the turn-off times of the switching elements at the next turn-off event.

The overcurrent protection device includes: a current detection unit configured to detect, as a sense voltage, a sense current flowing through a current sense terminal of a voltage-controlled semiconductor device; an overcurrent detection unit configured to compare the sense voltage detected by the current detection unit with an overcurrent threshold value to output an overcurrent detection signal; a mode determination unit configured to determine whether a superposition mode in which a transient sense voltage is superimposed on the sense voltage or a normal mode in which the transient sense voltage is not superimposed on the sense voltage; and a timing adjustment unit configured to adjust a detection start timing of the overcurrent detection signal based on a result of determination by the mode determination unit.

The overcurrent protection device includes: a current detection unit configured to detect, as a sense voltage, a sense current flowing through a current sense terminal of a voltage-controlled semiconductor device; an overcurrent detection unit configured to compare the sense voltage detected by the current detection unit with an overcurrent threshold value to output an overcurrent detection signal; a mode determination unit configured to determine whether a superposition mode in which a transient sense voltage is superimposed on the sense voltage or a normal mode in which the transient sense voltage is not superimposed on the sense voltage; and a timing adjustment unit configured to adjust a detection start timing of the overcurrent detection signal based on a result of determination by the mode determination unit.

An example system comprises: a power transistor comprising a gate, a first terminal, and a second terminal; a transistor comprising a gate, a first terminal, and a second terminal coupled to the gate of the power transistor; a capacitive divider coupled to the first terminal of the power transistor and the gate of the transistor; and a resistive divider coupled to the first terminal of the power transistor and the gate of the transistor.

An example system comprises: a power transistor comprising a gate, a first terminal, and a second terminal; a transistor comprising a gate, a first terminal, and a second terminal coupled to the gate of the power transistor; a capacitive divider coupled to the first terminal of the power transistor and the gate of the transistor; and a resistive divider coupled to the first terminal of the power transistor and the gate of the transistor.

A description is given below of an intelligent semiconductor switch and also a method for operating an intelligent semiconductor switch integrated in a chip package. In accordance with one exemplary embodiment, the method comprises, in a first mode, in which a state control signal having a first logic level is received at a control terminal of the chip package, driving a first and a second semiconductor switch of a half-bridge in accordance with an input signal received at an input terminal of the chip package. In a second mode, in which a state control signal having a second logic level is received at the control terminal of the chip package, the method comprises setting an operating parameter depending on a pulse pastern of the input signal received at the input terminal.

A description is given below of an intelligent semiconductor switch and also a method for operating an intelligent semiconductor switch integrated in a chip package. In accordance with one exemplary embodiment, the method comprises, in a first mode, in which a state control signal having a first logic level is received at a control terminal of the chip package, driving a first and a second semiconductor switch of a half-bridge in accordance with an input signal received at an input terminal of the chip package. In a second mode, in which a state control signal having a second logic level is received at the control terminal of the chip package, the method comprises setting an operating parameter depending on a pulse pastern of the input signal received at the input terminal.

The disclosure relates to a contactor having electronic coil control for a magnet coil, the operation of keeping the pull-in power of the magnet coil constant being formed by current clocking, and having a safety-related output assembly of a programmable logic controller for the fault diagnosis of the contactor, the safety-related output assembly determining the flow of current flowing into the contactor and detecting a fault if a limit value is undershot and switching off. In the contactor disclosed herein, a connectable base load is integrated in the contactor.

The disclosure relates to a contactor having electronic coil control for a magnet coil, the operation of keeping the pull-in power of the magnet coil constant being formed by current clocking, and having a safety-related output assembly of a programmable logic controller for the fault diagnosis of the contactor, the safety-related output assembly determining the flow of current flowing into the contactor and detecting a fault if a limit value is undershot and switching off. In the contactor disclosed herein, a connectable base load is integrated in the contactor.

A system includes an electric motor, at least one pair of high side and low side switches connected to the electric motor, and a microcontroller connected to the high side and low side switches. At least the low side switches have a minimum on-time requirement. The microcontroller controls the switches by outputting a pulse-width modulation (PWM) signal. At least the PWM signal outputted to the low side switch is center-aligned to the off-time. When a request is made to the microcontroller resulting in a low side on-time of zero with a previous duty cycle request that is greater than a predetermined threshold, the microcontroller is constructed and arranged to extend the duty cycle of the low side switch of the at least one pair of switches into the next period to a duration of the required minimum on-time.