An integrated circuit that may be employed as a smart switch. The integrated circuit includes a first part of a semiconductor switch coupled between a supply node and an output node and configured to provide a first current path in accordance with a first drive signal. The integrated circuit further includes a second part of the semiconductor switch coupled between the supply node and the output node and configured to provide a second current path in accordance with a second drive signal. The integrated circuit includes a drive circuit configured to generate, in response to a switch-on command, the first drive signal and the second drive signal such that the first part of the semiconductor switch and the second part of the semiconductor switch are alternatingly switched on and off. During an overlap period, both the first and the second part of the semiconductor switch are in an on-state.

A control circuit includes: a transistor controller that controls a voltage at a gate terminal of a field effect transistor in accordance with a difference in voltage between a source terminal and a drain terminal of the field effect transistor connected so that a body diode is in a forward direction; and a current controller that reduces an operating current for operating the transistor controller when a load connected via the source terminal of the field effect transistor is light, and increases the operating current when the load is heavy.

An ideal diode circuit is described which uses an NMOS transistor as a low-loss ideal diode. The control circuit for the transistor is referenced to the anode voltage and not to ground, so the control circuitry may be low voltage circuitry, even if the input voltage is very high, referenced to earth ground. A capacitor is clamped to about 10-20V, referenced to the anode voltage. The clamped voltage powers a differential amplifier for the detecting if the anode voltage is greater than the cathode voltage. The capacitor is charged to the clamped voltage during normal operation of the ideal diode by controlling the conductivity of a second transistor coupled between the cathode and the capacitor, enabling the circuit to be used with a wide range of frequencies and voltages. All voltages applied to the differential amplifier are equal to or less than the clamped voltage.

An electrical system may include a mounting surface, a component configured for connection with the mounting surface and configured to move relative to the mounting surface, and/or an orientation sensor configured to determining an orientation of the component relative to the mounting surface. The orientation sensor may include a first sensor (e.g., a magnetometer, an accelerometer, a gyroscope, etc.) connected, at least indirectly, to the mounting surface, and a second sensor (e.g., a magnetometer, an accelerometer, a gyroscope, etc.) connected to move with the component. The orientation sensor may include an electronic controller. The electronic controller may be configured to compare first information from the first sensor to second information from the second sensor to determine the orientation of the component relative to the mounting surface.

A drive circuit drives a switch that has first and second terminals and a control terminal. The drive circuit includes a discharge path, a capacitor, an AC suppressor and a DC voltage generator. The discharge path connects the control terminal and the second terminal. The capacitor has a high-potential terminal connected to the second terminal side and a low-potential terminal connected to the control terminal side. The AC suppressor has a first end connected to a part of the discharge path between the high-potential terminal the second terminal. The DC voltage generator has a connection terminal connected to a second end of the AC suppressor. The DC voltage generator regulates electric current flowing between the connection terminal and the AC suppressor so as to keep the potential of the part of the discharge path between the high-potential terminal and the second terminal higher than the potential of the low-potential terminal.

A drive circuit drives a switch that has first and second terminals and a control terminal. The drive circuit includes a discharge path, a capacitor, an AC suppressor and a DC voltage generator. The discharge path connects the control terminal and the second terminal. The capacitor has a high-potential terminal connected to the second terminal side and a low-potential terminal connected to the control terminal side. The AC suppressor has a first end connected to a part of the discharge path between the high-potential terminal the second terminal. The DC voltage generator has a connection terminal connected to a second end of the AC suppressor. The DC voltage generator regulates electric current flowing between the connection terminal and the AC suppressor so as to keep the potential of the part of the discharge path between the high-potential terminal and the second terminal higher than the potential of the low-potential terminal.

An RF signal switch circuit that allows connection of any of N radio frequency (RF) input terminals to a switch output port, either in a low loss mode, in a bypass mode, or, optionally, in a signal function mode. Embodiments of the invention allow for both a single switch in the series input path to a target circuit while still having the ability to isolate the bypass path from the target circuit. In the low loss and bypass mode, the circuit simultaneously exhibits low input insertion loss (and thus a low noise factor) and high bypass mode isolation.

In a semiconductor device capable of product-sum operation, variations in transistor characteristics are reduced. The semiconductor device includes a first circuit including a driver unit, a correction unit, and a holding unit, and an inverter circuit. The first circuit has a function of generating an inverted signal of a signal input to an input terminal of the first circuit and outputting the inverted signal to an output terminal of the first circuit. The driver unit includes a p-channel first transistor and an n-channel second transistor having a back gate. The correction unit has a function of correcting the threshold voltage of one or both of the first transistor and the second transistor. The holding unit has a function of holding the potential of the back gate of the second transistor. The output terminal of the first circuit is electrically connected to an input terminal of the inverter circuit. The time from the input of a signal to the input terminal of the first circuit to the output of a signal from an output terminal of the inverter circuit depends on the potential of the back gate of the second transistor.

An electrical system may include an electrical unit including a power source, a switch assembly electrically connected to the power source, an activation portion electrically connected to the switch assembly, an electrical latch electrically connected to the pulse generator and/or the switch assembly, and/or a controller electrically connected to the switch assembly and the electrical latch. An embodiment of a method of operating the electrical system may include activating the activation portion; activating, via the activation portion, the switch assembly to electrically connect the controller with the power source; latching the switch assembly in an activated state via the electrical latch; and/or unlatching the switch assembly via the controller to electrically disconnect the controller from the power source.

A gate driver circuit drives a switching transistor. A variable current source generates a reference current configured to switch between a first current amount and a second current amount smaller than the first current amount. A current distribution circuit is configured to switch between a source enabled state in which a source current proportional to the reference current is sourced to a gate node of the switching transistor and a disabled state in which the source current is made equal to zero. A first transistor fixes the gate node of the switching transistor to a high voltage in an on-state of the first transistor. A second transistor fixes the gate node of the switching transistor to a low voltage in an on-state of the second transistor.