A clock multiplexer device includes first and second control circuitries and an output circuitry. The first control circuitry generates a first enable signal and a first signal according to a first clock signal and a first selection signal, and determines whether to output the first signal to be a first output clock signal according to a second selection signal and a second enable signal. The first and the second selection signals have opposite logic values. The second control circuitry generates the second enable signal and a second signal according to a second clock signal and the second selection signal, and determines whether to output the second signal to be a second output clock signal according to the first selection signal and the first enable signal. The output circuitry outputs one of the first output clock signal and the second output clock signal to be a final clock signal.

A current blocking element is provided. The current blocking element includes a first electrode layer, an ion conductive layer, and a second electrode layer, which are laminated in this order, wherein the first electrode layer is configured to hold ions; the ion conductive layer has ionic conductivity and does not have electronic conductivity; and the second electrode layer is configured to hold ions. Ions held in the first electrode layer are moved to the second electrode layer when current is configured to flow between the first electrode layer and the second electrode layer. Current flow between the first electrode layer and the second electrode layer is blocked when ions held in one of the first and second electrode layers are depleted saturated.

A current blocking element is provided. The current blocking element includes a first electrode layer, an ion conductive layer, and a second electrode layer, which are laminated in this order, wherein the first electrode layer is configured to hold ions; the ion conductive layer has ionic conductivity and does not have electronic conductivity; and the second electrode layer is configured to hold ions. Ions held in the first electrode layer are moved to the second electrode layer when current is configured to flow between the first electrode layer and the second electrode layer. Current flow between the first electrode layer and the second electrode layer is blocked when ions held in one of the first and second electrode layers are depleted saturated.

This disclosure describes circuits and techniques for identifying potential problems with control signals for power switches. More specifically, this disclosure describes the use of registers, e.g., volatile or non-volatile storage elements, configured to count the rising and/or falling edges of pulse modulation (PM) signals within driver circuits or other control circuits. By counting the edges of PM signals within driver circuits, signaling problems can be identified based on mismatch between different counters. The techniques may be used by a driver circuit to detect circuit problems, or readout of the registers can be done after device failure, in order to help identify whether signaling problems may have caused the device failure.

This disclosure describes circuits and techniques for identifying potential problems with control signals for power switches. More specifically, this disclosure describes the use of registers, e.g., volatile or non-volatile storage elements, configured to count the rising and/or falling edges of pulse modulation (PM) signals within driver circuits or other control circuits. By counting the edges of PM signals within driver circuits, signaling problems can be identified based on mismatch between different counters. The techniques may be used by a driver circuit to detect circuit problems, or readout of the registers can be done after device failure, in order to help identify whether signaling problems may have caused the device failure.

Switch circuits for electrical power are formed of a hybrid coupler configured to receive a signal as an input, and output first and second pulsed wave signals along first and second signal paths, respectively; in a plurality of time frames, wherein the phases of the first and second pulsed wave signals along first and second signal paths are aligned. The switch circuits may be incorporated in time folding power circuits as an exemplary application.

Switch circuits for electrical power are formed of a hybrid coupler configured to receive a signal as an input, and output first and second pulsed wave signals along first and second signal paths, respectively; in a plurality of time frames, wherein the phases of the first and second pulsed wave signals along first and second signal paths are aligned. The switch circuits may be incorporated in time folding power circuits as an exemplary application.

A switching regulator is disclosed comprising a high-voltage port, a low-voltage port, n number of switching poles, a magnetic element, and a controller. In turn, each switching pole connects across the high-voltage port and may consist of either one switch and one diode or two switches and two diodes. In turn, the magnetic element comprises a ferro-core having n number of magnetic branches, each of which includes a winding. Each winding start connects to the phase node of a respective switching pole, while each winding finish connects, in common, to one side of the low-voltage port. An n+1.sup.th magnetic branch establishes a defined common-mode inductance which, in combination with transformer action, limits current ripple. The transformer action serves to exchange ripple power between phases such that the need for inductance is greatly reduced.

A switching regulator is disclosed comprising a high-voltage port, a low-voltage port, n number of switching poles, a magnetic element, and a controller. In turn, each switching pole connects across the high-voltage port and may consist of either one switch and one diode or two switches and two diodes. In turn, the magnetic element comprises a ferro-core having n number of magnetic branches, each of which includes a winding. Each winding start connects to the phase node of a respective switching pole, while each winding finish connects, in common, to one side of the low-voltage port. An n+1.sup.th magnetic branch establishes a defined common-mode inductance which, in combination with transformer action, limits current ripple. The transformer action serves to exchange ripple power between phases such that the need for inductance is greatly reduced.

A current blocking element assembly is provided and includes first and second current blocking elements, first current blocking element including: first-A electrode layer configured to hold ions; first ion conductive layer configured to conduct ions and does not have electronic conductivity; and second-A electrode layer configured to hold ions, first-A electrode layer, first ion conductive layer, and second-A electrode layer laminated in order, second current blocking element including: first-B electrode layer configured to hold ions; second ion conductive layer configured to conduct ions and does not have electronic conductivity; and second-B electrode layer configured to hold ions, first-B electrode layer, second ion conductive layer, and second-B electrode layer laminated in order, wherein the second-A electrode layer and the second-B electrode layer are electrically connected.