A power supply monitor includes a delta-sigma modulator including an input receiving a binary number and an output providing a pulse-density modulated signal, the delta-sigma modulator operable to scale the pulse-density modulated signal based on the binary number. A fast droop detector circuit includes a level shifter providing the modulated signal referenced to a clean supply voltage. A lowpass filter is coupled between the level shifter and a comparator. The comparator produces a droop detection signal at said output responsive to a monitored supply voltage dropping below a predetermined level relative to the filtered signal.

A semiconductor device includes a memory cell array including a plurality of memory blocks, a control logic, a level shifter configured to generate a first internal voltage and a second internal voltage lower than the first internal voltage using a received external voltage on the basis of a control signal from the control logic, and a row decoder configured to provide the first and second internal voltages generated by the level shifter to the memory cell array. The level shifter generates the first internal voltage using the external voltage, generates the second internal voltage using the generated first internal voltage in a power-up mode of the semiconductor device, and generates the second internal voltage using the external voltage in a standby mode of the semiconductor device.

A semiconductor integrated circuit device includes: first and second transistors provided between a first power source and an output terminal; a step-down circuit that generates a second power source from the first power source; a power source switch circuit that outputs, as a fourth power source, a higher one of potentials of the second power source and a third power source; and a level shifter circuit that transits between the first power source and a fourth power source. The first transistor has a gate connected to an output of the level shifter circuit; the second transistor has a gate connected to the fourth power source.

A method and associated systems for using direct sums and invariance groups to optimize the testing of partially symmetric quantum-logic circuits is disclosed. A test system receives information that describes the architecture of a quantum-logic circuit to be tested. The system uses this information to organize the circuit's inputs into two or more mutually exclusive subsets of inputs. The system computes a direct sum of a set of groups associated with the subsets in order to generate an invariance group that contains one or more invariant permutations of the circuit's inputs. These invariant permutations can be used to reduce the number of tests required to fully verify the circuit for all possible input vectors. Once one specific input vector has been verified, there is no need to test other vectors that can be generated by performing any one of the invariant permutations upon the previously verified vector.

A power supply circuit includes: a regulator configured to receive a first power supply voltage and a third power supply voltage higher than the first power supply voltage and output a regulated voltage between the first power supply voltage and the third power supply voltage based on the third power supply voltage; and an output control circuit configured to select the first power supply voltage or the regulated voltage to output as a second power supply voltage. The output control circuit outputs the first power supply voltage as the second power supply voltage when the third power supply voltage is lower than a threshold voltage, whereas the output control circuit outputs the regulated voltage as the second power supply voltage when the third power supply voltage is higher than or equal to the threshold voltage.

A low leakage level shifter circuit converts a lower voltage signal to a higher voltage signal. The level shifter includes a half-latch with an output node that is toggled between the higher voltage and a reference voltage based on an input signal toggled between the lower voltage and the reference voltage. Crosscoupled transistors keep one of the output node and a complement node charged to the higher voltage by a charge transistor while the other node is discharged by a discharge transistor. To discharge the charged node, current through the discharge transistor needs to be higher than current through the charge transistor, but the discharge transistor is only partially turned on by the lower voltage input signal. First and second resistors coupled between the charge transistors and a voltage source reduce current through the charge transistors, allowing the discharge transistors to be smaller to avoid a high leakage current.

A low leakage level shifter circuit converts a lower voltage signal to a higher voltage signal. The level shifter includes a half-latch with an output node that is toggled between the higher voltage and a reference voltage based on an input signal toggled between the lower voltage and the reference voltage. Crosscoupled transistors keep one of the output node and a complement node charged to the higher voltage by a charge transistor while the other node is discharged by a discharge transistor. To discharge the charged node, current through the discharge transistor needs to be higher than current through the charge transistor, but the discharge transistor is only partially turned on by the lower voltage input signal. First and second resistors coupled between the charge transistors and a voltage source reduce current through the charge transistors, allowing the discharge transistors to be smaller to avoid a high leakage current.

Devices, systems, and methods for verifying integrity of a signal path across an isolation barrier are discloses. The devices, systems, and methods insert a marker signal into the signal path across the isolation barrier. The marker includes an analog signal. The devices, systems, and methods transmit a version of the marker signal across the isolation barrier and receiving a signal comprising the transmitted version of the marker signal. The devices, systems, and methods verify the integrity of the signal path based on the received signal.

A stack of series coupled transistors comprising, at least two sub-portions of the stack of series coupled transistors, and at least one logic decoder coupled to the at least two sub-portions to turn ON at least one sub-portion.

A personal laboratory includes a self-contained, miniaturized, portable kit that provides for design, testing, and automated assembling, dissembling, and reassembling of a physical system (rather than a simulation) with flexibility as to the variety of configurations of components that may be designed and assembled, and easy integration of complex components. The personal laboratory includes a reconfigurable system, the reconfigurable system includes a plurality of functional components, and a plurality of connectors configured for operatively connect respective functional components to other functional components; a stimulus generator configured to apply a stimulus to the reconfigurable system; and a measurement system configured to measure a response to the applied stimulus generated by the reconfigurable system. In the context of electronic circuits, the reconfigurable system is a reconfigurable circuit, the functional components are circuit elements and the connectors are electrical connectors.