At least one embodiment of the present disclosure provides a frequency divider, an electronic device and a frequency dividing method. The frequency divider includes a duty cycle correction circuit and a frequency divider circuit. The duty cycle correction circuit is configured to receive a first clock signal, and perform a first processing on the first clock signal to generate a first processed signal. The frequency dividing circuit is configured to receive the first processed signal, and perform a second processing on the first processed signal to generate a second processed signal. The duty cycle correction circuit is further configured to receive the second processed signal, and perform a third processing on the second processed signal to generate a third processed signal. The frequency divider can correct the duty cycle of the output clock signal while dividing the frequency.

Provided is a counter unit capable of supporting any output apparatus of single-phase output, two-phase output, or three-phase output without waste. A counter unit (10) is provided with: a plurality of signal input terminals to which pulse signals outputted from a plurality of external output apparatuses (50) are respectively inputted; input circuits (21a to 21f) respectively connected to the plurality of signal input terminals; a single-phase counter (13) that performs count on the basis of a single-phase pulse signal, and a multi-phase counter (15) that performs count on the basis of a multi-phase pulse signal; and a switching part (16) that switches whether the input circuits (21a to 21f) are connected to the single-phase counter (13) or the multi-phase counter (15).

An apparatus includes an adjustment circuit configured to receive a pulsed-width modulation (PWM) input, generate an adjusted PWM signal based upon the PWM input, and determine that a first pulse of the PWM input is shorter than a runt signal limit. The adjustment circuit is further configured to, in the adjusted PWM signal, extend the first pulse of the PWM input based on the determination that the PWM input is shorter than the runt signal limit, and output the adjusted PWM signal to an electronic device.

An apparatus includes an adjustment circuit configured to receive a pulsed-width modulation (PWM) input, generate an adjusted PWM signal based upon the PWM input, and determine that a first pulse of the PWM input is shorter than a runt signal limit. The adjustment circuit is further configured to, in the adjusted PWM signal, extend the first pulse of the PWM input based on the determination that the PWM input is shorter than the runt signal limit, and output the adjusted PWM signal to an electronic device.

A method for calibrating a first clock signal output by an oscillation module to obtain a calibrated second clock signal includes obtaining a first count value by counting a third clock signal of an external device. A second count value is obtained by counting a scan signal of the oscillation module, and a first cycle ratio is obtained based on the first count value and the second count value. It is determined whether the first clock signal has a frequency deviation by comparing the first cycle ratio with a reference cycle ratio. A frequency division coefficient of the oscillation module is adjusted when the first clock signal has the frequency deviation, so that the oscillation module divides a frequency of the first clock signal according to the adjusted frequency division coefficient, thereby obtaining the calibrated second clock signal.

A method for calibrating a first clock signal output by an oscillation module to obtain a calibrated second clock signal includes obtaining a first count value by counting a third clock signal of an external device. A second count value is obtained by counting a scan signal of the oscillation module, and a first cycle ratio is obtained based on the first count value and the second count value. It is determined whether the first clock signal has a frequency deviation by comparing the first cycle ratio with a reference cycle ratio. A frequency division coefficient of the oscillation module is adjusted when the first clock signal has the frequency deviation, so that the oscillation module divides a frequency of the first clock signal according to the adjusted frequency division coefficient, thereby obtaining the calibrated second clock signal.

Provided is a counter unit capable of supporting any output apparatus of single-phase output, two-phase output, or three-phase output without waste. A counter unit (10) is provided with: a plurality of signal input terminals to which pulse signals outputted from a plurality of external output apparatuses (50) are respectively inputted; input circuits (21a to 21f) respectively connected to the plurality of signal input terminals; a single-phase counter (13) that performs count on the basis of a single-phase pulse signal, and a multi-phase counter (15) that performs count on the basis of a multi-phase pulse signal; and a switching part (16) that switches whether the input circuits (21a to 21f) are connected to the single-phase counter (13) or the multi-phase counter (15).

A method and system are provided for controlling transfer switch operations in a power distribution system. The method and system involve monitoring an electrical parameter of an electrical signal from a first power source associated with supplying power to a load; determining whether the electrical parameter satisfies a parameter threshold; selecting to increment or decrement a count value in accordance with the determination; and responsive to determining that the count value satisfies a first count threshold, initiating a start signal to start operation of a second power source to supply power to the load. The electrical parameter can be voltage or frequency, or other parameter(s) from which a power quality of the electrical signal may be evaluated. The electrical signal can be a single or polyphase electrical signal.

A method and system are provided for controlling transfer switch operations in a power distribution system. The method and system involve monitoring an electrical parameter of an electrical signal from a first power source associated with supplying power to a load; determining whether the electrical parameter satisfies a parameter threshold; selecting to increment or decrement a count value in accordance with the determination; and responsive to determining that the count value satisfies a first count threshold, initiating a start signal to start operation of a second power source to supply power to the load. The electrical parameter can be voltage or frequency, or other parameter(s) from which a power quality of the electrical signal may be evaluated. The electrical signal can be a single or polyphase electrical signal.

An apparatus includes an adjustment circuit configured to receive a pulsed-width modulation (PWM) input, generate an adjusted PWM signal based upon the PWM input, and determine that a first pulse of the PWM input is shorter than a runt signal limit. The adjustment circuit is further configured to, in the adjusted PWM signal, extend the first pulse of the PWM input based on the determination that the PWM input is shorter than the runt signal limit, and output the adjusted PWM signal to an electronic device.