There is configured an oscillator including a resonator, and a circuit device, wherein the circuit device includes a first terminal, a storage circuit configured to store data corresponding to an external signal input from the first terminal, an oscillation circuit configured to generate an oscillation signal using the resonator, a counter circuit configured to count a period in which the external signal has a first polarity and a period in which the external signal has a second polarity using a clock signal generated based on the oscillation signal, and a processing circuit configured to write the data in the storage circuit based on a counting result of the counter circuit.

There is configured an oscillator including a resonator, and a circuit device, wherein the circuit device includes a first terminal, a storage circuit configured to store data corresponding to an external signal input from the first terminal, an oscillation circuit configured to generate an oscillation signal using the resonator, a counter circuit configured to count a period in which the external signal has a first polarity and a period in which the external signal has a second polarity using a clock signal generated based on the oscillation signal, and a processing circuit configured to write the data in the storage circuit based on a counting result of the counter circuit.

An electronic device comprising one or more subcircuits configured to receive a clock signal, the clock signal configured to switch from a reference clock signal to a second clock signal based on a clock bypass signal, a timer configured to receive the reference clock signal and output an alignment signal based on the reference clock signal, wherein a frequency of the alignment signal is determined based on clock frequencies of the one or more subcircuits; a clock alignment module coupled to the timer and the one or more subcircuits and configured to receive the clock bypass signal, determine that the clock bypass signal has changed to switch the one or more subcircuits to the reference clock signal from the second clock signal, block the clock signal from being received by the one or more subcircuits, receive the alignment signal, and unblock the clock signal based on the alignment signal.

An electronic device comprising one or more subcircuits configured to receive a clock signal, the clock signal configured to switch from a reference clock signal to a second clock signal based on a clock bypass signal, a timer configured to receive the reference clock signal and output an alignment signal based on the reference clock signal, wherein a frequency of the alignment signal is determined based on clock frequencies of the one or more subcircuits; a clock alignment module coupled to the timer and the one or more subcircuits and configured to receive the clock bypass signal, determine that the clock bypass signal has changed to switch the one or more subcircuits to the reference clock signal from the second clock signal, block the clock signal from being received by the one or more subcircuits, receive the alignment signal, and unblock the clock signal based on the alignment signal.

The disclosure provides a microcontroller which has an internal timing device for generating an internal clock signal, at least one terminal contact for receiving an external clock signal, a clock changing device and a timer module, which is electrically conductively connected to the at least one terminal contact and to the internal timing device and, after the microcontroller has been switched on, is set up to determine a frequency of the external clock signal by means of the clock signal, and to determine at least one parameter by means of which the clock changing device can be set up to change the external clock signal into a useful clock signal with a predefined frequency.

The disclosure provides a microcontroller which has an internal timing device for generating an internal clock signal, at least one terminal contact for receiving an external clock signal, a clock changing device and a timer module, which is electrically conductively connected to the at least one terminal contact and to the internal timing device and, after the microcontroller has been switched on, is set up to determine a frequency of the external clock signal by means of the clock signal, and to determine at least one parameter by means of which the clock changing device can be set up to change the external clock signal into a useful clock signal with a predefined frequency.

Systems, apparatuses, and methods for conveying and receiving information as electrical signals in a computing system are disclosed. A computing system includes multiple transmitters sending singled-ended data signals to multiple receivers. A termination voltage is generated and sent to the multiple receivers. The termination voltage is coupled to each of signal termination circuitry and signal sampling circuitry within each of the multiple receivers. Any change in the termination voltage affects the termination circuitry and affects comparisons performed by the sampling circuitry. Received signals are reconstructed at the receivers using the received signals, the signal termination circuitry and the signal sampling circuitry.

Systems, apparatuses, and methods for conveying and receiving information as electrical signals in a computing system are disclosed. A computing system includes multiple transmitters sending singled-ended data signals to multiple receivers. A termination voltage is generated and sent to the multiple receivers. The termination voltage is coupled to each of signal termination circuitry and signal sampling circuitry within each of the multiple receivers. Any change in the termination voltage affects the termination circuitry and affects comparisons performed by the sampling circuitry. Received signals are reconstructed at the receivers using the received signals, the signal termination circuitry and the signal sampling circuitry.

A circuit arrangement for charge integration may include an input for applying a signal representing charge pulses, an output for providing an integrated signal, and an integrating circuit connected between the input and the output, comprising a resistive circuit and a capacitor and having an RC time constant which is a function of the resistive circuit and the capacitor. The circuit arrangement may include a feedback control circuit connected at its input, to the output of the circuit arrangement and providing, at its output, a control signal, where at least one of the resistive circuit and the capacitor has a variable value based on the control signal.

A circuit arrangement for charge integration may include an input for applying a signal representing charge pulses, an output for providing an integrated signal, and an integrating circuit connected between the input and the output, comprising a resistive circuit and a capacitor and having an RC time constant which is a function of the resistive circuit and the capacitor. The circuit arrangement may include a feedback control circuit connected at its input, to the output of the circuit arrangement and providing, at its output, a control signal, where at least one of the resistive circuit and the capacitor has a variable value based on the control signal.