Patent classifications
H03K21/40
SENSING CIRCUIT OF MOVING BODY AND MOVING BODY SENSING DEVICE
A sensing circuit in a device having a moving body in which a unit to be detected including first and second pattern units spaced apart from each other is formed includes an oscillation circuit unit including first and second oscillation circuits fixedly mounted on a substrate spaced apart from the unit to be detected, including, respectively, first and second sensing coils having first and second inductance values depending on areas of overlap between the first and second sensing coils and the first and second pattern units and outputting, respectively, first and second sensed oscillation signals based on the first and second inductance values; and a sensing circuit outputting an output signal having movement information of the moving body based on each period count value for each of the first and second sensed oscillation signals using a reference oscillation signal.
METHOD AND APPARATUS FOR IMPLEMENTING DRIVE SIGNAL FOR DRIVING RESOLVER SENSOR
A method and apparatus for generating a drive signal for driving a resolver sensor are provided. The method and apparatus implement a drive signal to be input to a resolver sensor. The method and apparatus perform counting in association with an incoming square wave signal and implement a drive signal after confirming that a specific point corresponding to a preset condition of the incoming square wave signal arrives.
METHOD AND APPARATUS FOR IMPLEMENTING DRIVE SIGNAL FOR DRIVING RESOLVER SENSOR
A method and apparatus for generating a drive signal for driving a resolver sensor are provided. The method and apparatus implement a drive signal to be input to a resolver sensor. The method and apparatus perform counting in association with an incoming square wave signal and implement a drive signal after confirming that a specific point corresponding to a preset condition of the incoming square wave signal arrives.
Clock divider with quadrature error correction
The present disclosure relates to a method for quadrature error correction using a frequency divider circuit. The method comprises delaying input of data to master input terminals and/or slave input terminals of the frequency divider circuit for correcting a quadrature error between the in-phase and quadrature-phase output signals.
Clock divider with quadrature error correction
The present disclosure relates to a method for quadrature error correction using a frequency divider circuit. The method comprises delaying input of data to master input terminals and/or slave input terminals of the frequency divider circuit for correcting a quadrature error between the in-phase and quadrature-phase output signals.
Apparatus and methods for reducing clock-ungating induced voltage droop
Aspects of the disclosure are directed to reducing clock-ungating induced voltage droop by determining a maximum frequency value associated with an output clock waveform; modulating a clock frequency of the output clock waveform for a first time duration based on a first programmable mask pattern or a first Boolean function; and determining if either the first programmable mask pattern or the first Boolean function should be changed. In accordance with one aspect, a voltage droop mitigation circuit includes a control logic for receiving an input clock waveform and a clock enable signal waveform and for outputting a gated clock enable signal waveform; a latch coupled to the control logic, the latch for holding a state of the gated clock enable signal waveform and a AND gate coupled to the latch, the AND gate for outputting an output clock waveform.
EVENT COUNTER CIRCUITS USING PARTITIONED MOVING AVERAGE DETERMINATIONS AND RELATED METHODS
An event counter circuit can be configured to monitor operation of a system where a moving average register circuit can be configured to store a moving average value updated in each cycle of operation of the system by adding a number of system events occurring during a current cycle of the system operation to either 1) a current moving average value stored in the moving average register circuit or 2) a keep value generated by partitioning the current moving average value into the keep value and a transfer value representing system events not included in a determination of the moving average value for subsequent cycles of operation of the system
Integration of Analog Circuits Inside Digital Blocks
A circuit for sensing local operating properties of an integrated circuit is disclosed. The circuit may include one or more sensor circuits configured to sense the local operating properties of the integrated circuit. The sensor circuits may receive a supply voltage with a magnitude in a limited range from a digital power supply that is different from the digital power supply that provides power to functional circuits in the integrated circuit. Level shifters may be coupled to the sensor circuits to shift output signals from the sensor circuits to levels that correspond to the digital power supply that provides power to functional circuits in the integrated circuit. Counters and a shift register may be coupled to the level shifters to receive the shifted output signals, the values of which may be used to determine the local operating properties of the integrated circuit as sensed by the sensor circuits.
Counter circuitry and method
Apparatus comprises master counter circuitry to generate a master count signal in response to a clock signal; slave counter circuitry responsive to the clock signal to generate a respective slave count signal; and a synchronisation connection providing signal communication between the master counter circuitry and the slave counter circuitry; the master counter circuitry being configured to provide to the slave counter circuitry via the synchronisation connection: (i) data indicative of a count offset value and (ii) a timing signal defining a timing relationship between the clock signal and the count offset value; and the slave counter circuitry being configured, during a synchronisation operation for that slave counter circuitry, to initialise a counting operation of that slave counter circuitry in response to the data indicative of the count offset value and a timing signal provided by the master counter circuitry.
SYNCHRONIZATION CIRCUIT FOR OSCILLATING MIRROR AND LASER
A control system for a laser scanning projector includes a mirror controller generating horizontal and vertical mirror synchronization signals for an oscillating mirror apparatus based upon a mirror clock signal, and laser modulation circuitry. The laser modulation circuitry generates horizontal and vertical laser synchronization signals as a function of a received laser clock signal, and generates control signals for a laser that emits a laser beam that impinges on the oscillating mirror apparatus. Synchronization circuitry generates the laser clock signal and sends the laser clock signal to the laser modulation circuitry, receives the horizontal and vertical mirror synchronization signals from the mirror controller, receives the horizontal and vertical laser synchronization signals from the laser modulation circuitry, and modifies the laser clock signal so as to achieve alignment between the horizontal and vertical mirror synchronization signals and the horizontal and vertical laser synchronization signals.