A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

The present disclosure relates to a semiconductor circuit breaker and, more specifically, to a semiconductor circuit breaker in which a protection circuit is modularized and thus maintenance and repair can be easily done. A semiconductor circuit breaker according to an embodiment of the present disclosure comprises: a main circuit unit connected between a power source and a load and having a semiconductor switch; an outer box equipped with the main circuit unit and having a module accommodation unit outside thereof; and a protection module detachably accommodated in the module accommodation unit.

A differential-slope-limiting-switch and method are provided. Generally, the switch includes a first transistor having a first source-drain (SD) and well coupled to a first port of the switch, a gate, and a second SD, and a second transistor having a first SD and well coupled to a second port, a gate, and a second SD coupled to the second SD of the first transistor. A selector-circuit couples the gate of the first transistor to a first current-source when a signal to close the switch is received, and to the first port when it is not received. A second selector-circuit couples the gate of the second transistor to a second current-source when the signal is received, or to the second port. First and second feedback-capacitors couple each gate to the port on opposite sides of the switch and with the current-sources limit a slope of voltage transitions across the closed switch.

Disclosed herein is a bridge rectifier and associated control circuitry collectively forming a “regtifier”, capable of both rectifying an input time varying voltage as well as regulating the rectified output voltage produced. To accomplish this, the gate voltages of transistors of the bridge rectifier that are on during a given phase may be modulated via analog control (to increase the on-resistance of those transistors) or via pulse width modulation (to turn off those transistors prior to the end of the phase). Alternatively or additionally, the transistors of the bridge rectifier that would otherwise be off during a given phase may be turned on to help dissipate excess power and thereby regulate the output voltage. A traditional voltage regulator, such as a low-dropout amplifier, is not used in this design.

Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: conducting a first load current from an upper terminal of the power module to an upper collector-emitter of the transistor, through the transistor, and from a lower collector-emitter to a lower terminal of the power module; and then responsive assertion of a first interrupt signal, interrupting the first load current from the lower collector-emitter to the lower terminal by opening a lower-main FET and thereby commutating a first shutoff current through a lower base of the transistor to the lower terminal; and blocking current from the upper terminal to the lower terminal by the transistor.

A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

A controller (3) includes an AC voltage generator (12) that generates first to Nth AC voltages, a DC voltage generator (13) that converts the first to Nth AC voltages into first to Nth DC voltages, respectively, and a driver (14) that turns on and off a switch (1) based on the first to Nth DC voltages. The AC voltage generator (12) includes first to Nth isolation transformers (T1 to TN). The primary windings of the nth and (n+1)th isolation transformers receive an AC source voltage. The nth to first isolation transformers are sequentially connected. The (n+1)th to Nth isolation transformers are sequentially connected. The first to Nth isolation transformers respectively output the first to Nth AC voltages from their respective secondary windings.

An apparatus includes a first drain/source region and a second drain/source region over a substrate, and a first gate adjacent to the first drain/source region and a second gate adjacent to the second drain/source region, wherein the first gate and the second gate are separated from each other, wherein the first drain/source region, the second drain/source region, the first gate and the second gate form two back-to-back connected transistors.

A switch comprising: a channel path comprising first and second MOS transistors with common source and gate terminals and drain terminals defining first and second terminals of the channel path; and control circuitry comprising: a third MOS transistor comprising: a gate coupled to the common source terminal; a source coupled to the common gate terminal by a resistor; and a drain coupled to a first reference terminal; a first current source coupled between the first reference terminal and the common gate terminal for providing a first current; a second current source coupled between the source terminal of the third MOS transistor and a second reference terminal for providing a second current greater than the first current; and a first switching arrangement configured to selectively enable and disable the first current source; and a second switching arrangement configured to selectively couple the common source terminal to the second reference terminal.

A bridge rectifier is controlled by control circuitry to act a “regtifier” which both regulates and rectifies without the use of a traditional voltage regulator. To accomplish this, the gate voltages of transistors of the bridge that are on during a given phase may be modulated to dissipate excess power. Gate voltages of transistors of the bridge that are off during the given phase may alternatively or additionally be modulated to dissipate excess power. The regtifier may act as two half-bridges that each power a different voltage converter, with those voltage converters powering a battery. The voltage converters may be switched capacitor voltage converters that switch synchronously with switching of the two half-bridges as they perform rectification.