Various embodiments provide a laser power beaming system that delivers power via high intensity light, such as from a laser, using either power over fiber or free space power to isolate (or eliminate) high frequency noise and electromagnetic interference (EMI) due to, for example, switching. Damage or other harms from the EMI may be prevented. The opto-isolated power may be delivered from a remote source, or within a switched device, such as a variable frequency drive (VFD), itself.

The technology of this application relates to a drive circuit with an energy recovery function, including a control circuit, an energy recovery drive circuit, a switch circuit, and a direct current power supply. The control circuit is configured to control an energy storage capacitor in the energy recovery drive circuit to charge a junction capacitor of the switch circuit at a first moment, and enable the direct current power supply to charge the junction capacitor of the switch circuit through the energy recovery drive circuit at a second moment, so that the switch circuit is switched on. The control circuit is further configured to control the junction capacitor of the switch circuit to charge the energy storage capacitor in the energy recovery drive circuit at a third moment, and enable the junction capacitor of the switch circuit to discharge to a ground through the energy recovery drive circuit at a fourth moment, so that the switch circuit is switched off.

A driver circuit for a low-inductance power module that has a connection and an output. The connection is connectable to the source contact of a power transistor and the output is connectable to the gate contact of the power transistor. The driver circuit is configured to produce, in a first operating mode, a first gate-source voltage for the gate contact of the power transistor and to provide the first gate-source voltage at the output of the driver circuit. The driver circuit is also configured to produce, in a second operating mode, during at least one preset minimum time span, a lower second gate-source voltage for the gate contact of the power transistor and to provide the second gate-source voltage at the output of the driver circuit.

Radio frequency switches with improved switching speed are provided. In certain embodiments, an RF switching circuit includes a FET switch including a gate, a digital buffer configured to provide a first output voltage to the gate of the FET during a steady-state, and a fast switching circuit in parallel with the digital buffer and configured to provide a second output voltage to the gate of the FET during a switching state. The fast switching circuit includes at least one charge pump configured to boost at least one supply voltage to a multiple of the at least one supply voltage. The fast switching circuit is configured to generate the second output voltage based on the boosted at least one supply voltage.

Provided is a switching circuit including an input terminal, a switching terminal, a ground terminal, a bootstrap terminal, a high side transistor connected to the input terminal and the switching terminal, a low side transistor connected to the switching terminal and the ground terminal, a bootstrap capacitor connected to the switching terminal and the bootstrap terminal, a bootstrap switch including a PMOS transistor, and a driver circuit that turns on the bootstrap switch in a period in which the low side transistor is on and that turns off the bootstrap switch in a period in which the low side transistor is off, in which the driver circuit includes a level shifter and a buffer, and the level shifter includes an output line, a first resistance, a first transistor, a second resistance, a third resistance, a second transistor, a third transistor, a first capacitor, and a fourth transistor.

Disclosed is a switching circuit including an input terminal, a switching terminal, a grounding terminal, a bootstrap terminal, a high-side transistor connected between the input terminal and the switching terminal, a low-side transistor connected between the switching terminal and the grounding terminal, a bootstrap capacitor connected between the switching terminal and the bootstrap terminal, a bootstrap switch connected between a constant voltage line and the bootstrap terminal, and a driver circuit configured to turn on the bootstrap switch in a period of time in which the low-side transistor is on and to turn off the bootstrap switch in a period of time in which the low-side transistor is off. The bootstrap switch includes two P-channel metal oxide semiconductor transistors connected in anti-series with each other between the constant voltage line and the bootstrap terminal.

The present disclosure concerns a device including a first switch, a diode, and a passive resistive element electrically in series between conduction and control terminals of the first switch, a terminal of the diode located on the side of the first switch being coupled to a node of application of a potential variable with respect to the potential of said conduction terminal.

The present disclosure relates to a bootstrapped switch circuit, a track-and-hold circuit, an analog-to-digital converter, a method for operating a track-and-hold circuit, a base station, and a mobile station. The bootstrapped switch circuit comprises an output for an output signal, a first input, a switching element configured to couple the output with a signal from the first input, a bootstrapper capacitor configured to drive the switching element, and a second input coupled to the bootstrapper capacitor.

This application relates to a charging protection circuit. The charging protection circuit implements overcurrent protection by using a four-terminal NMOS switching transistor. In the solution provided in this application, floating management is performed on a Sub port of the four-terminal NMOS switching transistor. Specifically, when the four-terminal NMOS switching transistor is turned on, potential of the Sub port is pulled up, to avoid an excessively large internal resistance of the four-terminal NMOS switching transistor caused by an excessively large voltage between the Sub port and a drain of the four-terminal NMOS switching transistor. In addition, this application further provides a charging circuit and an electronic device.

A current mirror circuit and a current generation circuit are connected in series between a power supply node and a ground node through a first node and a second node. Gates of transistors constituting the current mirror circuit are connected to the node that supplies an off-voltage of the transistors through a first switch, and is connected to the second node through a second switch. The second node is connected to the node that supplies an on-voltage of the transistors through a third switch. Before starting of the circuit, the first switch and the third switch are turned on while the second switch is turned off. After starting of the circuit, on and off of the first to third switches are switched.