Patent classifications
H03L7/02
Oscillator using supply regulation loop and operating method thereof
An oscillator using a supply regulation loop and a method of operating the oscillator are provided. The oscillator includes a reference voltage generator configured to generate reference voltages from a supply voltage, a supply regulation loop circuit including a first operational amplifier and a transistor, the first operational amplifier being configured to receive a first reference voltage of the reference voltages, and the transistor being connected to an output terminal of the first operational amplifier, and a frequency locked loop (FLL) circuit configured to generate a clock signal, based on an input voltage determined based on a current flowing in the transistor and a second reference voltage of the reference voltages, wherein the first operational amplifier may include an input terminal configured to receive the first reference voltage and to receive negative feedback from the transistor, and the output terminal being configured to generate an output voltage independent of noise of the supply voltage.
VARIABLE RESISTANCE CIRCUIT, OSCILLATOR CIRCUIT, AND SEMICONDUCTOR DEVICE
Provided is a variable resistance circuit in which the resistance value of the variable resistance circuit can be accurately adjusted, by reducing the error in the change amount of the resistance value of the variable resistance circuit due to the on-resistances of switch circuits even if the switch circuits that each bypass a resistor included in a ladder resistor circuit are switched between an OFF state and an ON state. This variable resistance circuit includes: a ladder resistor circuit including a plurality of resistors; a first switch circuit connected in series to one end of one resistor of the plurality of resistors; and a second switch circuit connected in parallel to a series circuit of the one resistor and the first switch circuit. When one of the first and second switch circuits is turned on, the other of the first and second switch circuits is turned off.
VARIABLE RESISTANCE CIRCUIT, OSCILLATOR CIRCUIT, AND SEMICONDUCTOR DEVICE
Provided is a variable resistance circuit in which the resistance value of the variable resistance circuit can be accurately adjusted, by reducing the error in the change amount of the resistance value of the variable resistance circuit due to the on-resistances of switch circuits even if the switch circuits that each bypass a resistor included in a ladder resistor circuit are switched between an OFF state and an ON state. This variable resistance circuit includes: a ladder resistor circuit including a plurality of resistors; a first switch circuit connected in series to one end of one resistor of the plurality of resistors; and a second switch circuit connected in parallel to a series circuit of the one resistor and the first switch circuit. When one of the first and second switch circuits is turned on, the other of the first and second switch circuits is turned off.
DIGITAL DOWNCONVERTER WITH DIGITAL OSCILLATOR FREQUENCY ERROR CORRECTION
A digital local oscillator includes a look-up table and oscillator control circuitry. The look-up table contains samples of the digital local oscillator signal. The oscillator control circuitry is configured to select samples from the look-up table based on an accumulated phase value. The oscillator control circuitry is also configured to add a correction value to the accumulated phase value based on a difference of a frequency of the digital local oscillator signal and a desired frequency.
DIGITAL DOWNCONVERTER WITH DIGITAL OSCILLATOR FREQUENCY ERROR CORRECTION
A digital local oscillator includes a look-up table and oscillator control circuitry. The look-up table contains samples of the digital local oscillator signal. The oscillator control circuitry is configured to select samples from the look-up table based on an accumulated phase value. The oscillator control circuitry is also configured to add a correction value to the accumulated phase value based on a difference of a frequency of the digital local oscillator signal and a desired frequency.
Oscillator system
An oscillator system includes a voltage controlled oscillator (VCO) circuit. The VCO circuit includes an output for providing an oscillation signal and input to receive a voltage that controls the frequency of the oscillation signal. The oscillator system includes a frequency to voltage circuit that receives the oscillation signal and produces a voltage that is dependent upon the frequency of the oscillation signal. The oscillator system includes a comparison circuit including an amplifier. The amplifier includes an inverting input, a non inverting input, and an output. During a first phase of the comparison circuit, the non inverting input receives a reference voltage and the inverting input is coupled to the output of the amplifier via a switch and to a capacitor wherein the capacitor samples the voltage of the output. During a second phase of the comparison circuit, the non inverting input receives the voltage produced by the frequency to voltage circuit and the switch between amplifier output and inverting input is open wherein the inverting input is coupled to the capacitor to receive the sampled voltage value. During the second phase, the output of the amplifier is provided to the input of the VCO circuit.
OSCILLATOR SYSTEM
An oscillator system includes a voltage controlled oscillator (VCO) circuit. The VCO circuit includes an output for providing an oscillation signal and input to receive a voltage that controls the frequency of the oscillation signal. The oscillator system includes a frequency to voltage circuit that receives the oscillation signal and produces a voltage that is dependent upon the frequency of the oscillation signal. The oscillator system includes a comparison circuit including an amplifier. The amplifier includes an inverting input, a non inverting input, and an output. During a first phase of the comparison circuit, the non inverting input receives a reference voltage and the inverting input is coupled to the output of the amplifier via a switch and to a capacitor wherein the capacitor samples the voltage of the output. During a second phase of the comparison circuit, the non inverting input receives the voltage produced by the frequency to voltage circuit and the switch between amplifier output and inverting input is open wherein the inverting input is coupled to the capacitor to receive the sampled voltage value. During the second phase, the output of the amplifier is provided to the input of the VCO circuit.
OSCILLATOR USING SUPPLY REGULATION LOOP AND OPERATING METHOD THEREOF
An oscillator using a supply regulation loop and a method of operating the oscillator are provided. The oscillator includes a reference voltage generator configured to generate reference voltages from a supply voltage, a supply regulation loop circuit including a first operational amplifier and a transistor, the first operational amplifier being configured to receive a first reference voltage of the reference voltages, and the transistor being connected to an output terminal of the first operational amplifier, and a frequency locked loop (FLL) circuit configured to generate a clock signal, based on an input voltage determined based on a current flowing in the transistor and a second reference voltage of the reference voltages, wherein the first operational amplifier may include an input terminal configured to receive the first reference voltage and to receive negative feedback from the transistor, and the output terminal being configured to generate an output voltage independent of noise of the supply voltage.
Integrated clock generator and method therefor
An integrated clock generator includes a tunable LC oscillator, a tunable frequency synthesizer, and a processor. The tunable LC oscillator has an input for receiving an oscillator control signal, and an output for providing an oscillator clock signal. The tunable frequency synthesizer has a clock input coupled to the output of the tunable LC oscillator, a control input for receiving a synthesizer control signal, and an output for providing a clock output signal. The processor has an input for receiving a data input signal, a first output for providing the oscillator control signal, and a second output for providing the synthesizer control signal. The processor provides the oscillator control signal and the synthesizer control signal such that the tunable frequency synthesizer generates the output clock signal at a frequency indicated by the data input signal, and provides the synthesizer control signal further in response to a dynamic condition.
Integrated clock generator and method therefor
An integrated clock generator includes a tunable LC oscillator, a tunable frequency synthesizer, and a processor. The tunable LC oscillator has an input for receiving an oscillator control signal, and an output for providing an oscillator clock signal. The tunable frequency synthesizer has a clock input coupled to the output of the tunable LC oscillator, a control input for receiving a synthesizer control signal, and an output for providing a clock output signal. The processor has an input for receiving a data input signal, a first output for providing the oscillator control signal, and a second output for providing the synthesizer control signal. The processor provides the oscillator control signal and the synthesizer control signal such that the tunable frequency synthesizer generates the output clock signal at a frequency indicated by the data input signal, and provides the synthesizer control signal further in response to a dynamic condition.