Described are apparatus and methods for analog to digital converter (ADC) with factoring and background clock calibration. An apparatus includes an ADC configured to sample and convert differential input signals using a reference clock to obtain a defined number of samples during a first state in an acquisition clock cycle, and a finite state machine circuit configured to obtain the defined number of samples from the ADC using a clock based on the reference clock, factor the defined number of samples based on at least a common mode offset associated with the ADC, and send offset factored output to a controller.

An integrated circuit includes an H-bridge circuit having a first output node for coupling to a high-side terminal of an inductor and a second output node for coupling to a low-side terminal of the inductor. A current sense FET is coupled between a current source and the lower supply voltage to provide a reference current that includes a peak current limit at a sensing node. A current-sense comparator has a first input coupled to the sensing node, a second input coupled to the second output node and an output coupled to send an output signal towards a driver control circuit. A FET linear detection circuit is coupled to receive a gate voltage of an active low-side power FET and has an output coupled to enable the current-sense comparator when the active low-side power FET is operating in a linear region.

Systems, methods, and devices for monitoring operation of industrial equipment are disclosed. In one embodiment, a monitoring system is provided that includes a passive backplane and one more functional circuits that can couple to the backplane. Each of the functional circuits that are coupled to the backplane can have access to all data that is delivered to the backplane. Therefore, resources (e.g., computing power, or other functionality) from each functional circuits can be shared by all active functional circuits that are coupled to the backplane. Because resources from each of the functional circuits can be shared, and because the functional circuits can be detachably coupled to the backplane, performance of the monitoring systems can be tailored to specific applications. For example, processing power can be increased by coupling additional processing circuits to the backplane.

A quantizer generates a thermometer coded signal from an analog voltage signal. Data weighted averaging (DWA) of the thermometer coded signal is accomplished by controlling the operation of a crossbar switch controlled by a switch control signal to generate an output DWA signal. The output DWA signal is latched to generate a latched output DWA signal which is processed along with bits of the thermometer coded input signal in feedback loop to generate the switch control signal. The latching of the output DWA signal is performed in an input register of a digital-to-analog converter which operates to convert the latched output DWA signal to a feedback analog voltage from which the analog voltage signal is generated. The switch control signal specifies a bit location for a beginning logic transition of the output DWA signal cycle based on detection of an ending logic transition of the latched DWA signal.

An interventional control method based on a computer control system. An interventional control system is designed on the basis of an original computer control system; the analog-to-digital conversion unit of the interventional control system receives a signal from the data acquisition module of the original computer control system and said signal is processed by a control processing unit according to a built-in program; then a digital-to-analog conversion unit performs digital-to-analog conversion on the signal output by the control processing unit and then outputs a signal obtained after the digital-to-analog conversion to the analog-to-digital conversion unit of the original computer control system. According to the interventional computer control system, on the basis of an original computer control system, the analog-to-digital conversion unit of the interventional control system receives a signal output from the data acquisition module of the original computer control system and control processing is performed on said output signal; then the digital-to-analog conversion unit of the interventional control system outputs a signal to the analog-to-digital conversion unit of the original computer control system. The function upgrade of an original computer control system is implemented without changing the operating program of the original computer control system.

Methods and apparatuses are described for secure transmission and authentication of a user credential. A device comprising a memory, a processor, and a laser diode identifies a first user credential comprising a sequence of alphanumeric characters, converts the first user credential into a first plurality of analog signals, and activates the laser diode using the first plurality of analog signals to emit light detectable by a emitted light sensor of a second device. The second device comprising a memory, a processor, and an emitted light sensor generates a second plurality of analog signals corresponding to light emitted by the laser diode and detected by the emitted light sensor, converts the second plurality of analog signals into a second user credential, and authenticates the second user credential.

A system and method are described herein, for determining operational status of one or more power-over-Ethernet powered loudspeakers, the system and method comprising: receiving audio data at an audio receiver; transmitting the received audio data from the audio receiver to one or more audio data interface devices using an audio-over-Internet Protocol (AoIP) encoding scheme using an Ethernet cable; receiving the transmitted AoIP encoded audio data at audio data interface device, converting the encoded audio data to an analog audio data signal, transmitting the analog audio data signal to at least one loudspeaker, and broadcasting the same as an acoustic audio signal; substantially continuously receiving and storing status information by a status monitor located in the audio data interface device; and transmitting the received and stored status information to the audio receiver.

A circuit configured to sense an input analog signal generated by a sensor at a first frequency and to generate an output digital signal indicative of the sensed input analog signal. The circuit includes a conditioning circuit, an ADC, a feedback circuit, and a low-pass filter. The conditioning circuit is configured to receive the input analog signal and to generate a conditioned analog signal. The ADC is configured to provide a converted digital signal based on the conditioned analog signal. The feedback circuit includes a band-pass filter configured to selectively detect a periodic signal at a second frequency higher than the first frequency and to act on the conditioning circuit to counter variations of the periodic signal at the second frequency. The low-pass filter is configured to filter out the periodic signal from the converted digital signal to generate the output digital signal.

Circuits, systems, and methods to switch modes based on temperature and to provide reference voltages are discussed herein. For example, a bandgap reference circuit may include one or more impedance elements and one or more switches coupled to the one or more impedance elements. The one or more switches may be controllable based on a temperature signal. The bandgap reference circuit may be configured to provide a bandgap reference voltage that is associated with less than a particular amount of voltage variation.

A device includes a memory array and a sense amplifier (SA), which receives bits of data over an input/output (I/O) data line in association with a program operation. A digital-to-analog converter (DAC) is to convert the bits of data to an analog voltage value. A first analog memory element is coupled with the DAC. A pre-charge transistor is coupled with a voltage supply and the first analog memory element, the pre-charge transistor to charge the first analog memory element to an initial voltage level. A second analog memory element is coupled in parallel with the first analog memory element. Transistor logic is coupled between the first analog memory element and the second analog memory element and to selectively enable the second analog memory element to consume charge from the first analog memory element until the first analog memory element stores the analog voltage value.