An impedance measuring apparatus is disclosed. The impedance measuring apparatus includes an input current generator configured to generate a sinusoidal input signal of a carrier frequency, a first electrode configured to apply the sinusoidal input signal to an object which has an impedance, a second electrode configured to receive an amplitude modulated signal from the object, a first amplifier configured to amplify the received amplitude modulated signal and output a first amplified signal, a baseline signal subtractor configured to subtract a baseline signal generated based on the first amplified signal from the amplitude modulated signal and output a subtraction modulated signal, an analog-to-digital converter (ADC) configured to convert the subtraction modulated signal to a digital modulated signal, and an impedance measurer configured to measure the impedance based on the digital modulated signal.

Circuits, systems, and methods to automatically switch modes to provide constant reference voltages are discussed herein. For example, a bandgap reference system may include a first bandgap reference circuit configured to provide a first bandgap reference voltage, a low dropout regulator coupled to the first bandgap reference circuit, a temperature circuit coupled to the low dropout regulator, and a second bandgap reference circuit coupled to the low dropout regulator and the temperature circuit. The second bandgap reference circuit may be configured to configure one or more impedance elements based at least in part on a temperature signal and provide a second bandgap reference voltage based on one or more currents that pass through the one or more impedance elements.

In an example method, network traffic transmitted between a plurality of network nodes via a communications network is monitored. Subsets of the network traffic are ranked according to one or more ranking criteria. A mesh network is deployed between the plurality of network nodes based on the ranking of the subsets of the network traffic. The mesh network includes a plurality of network links, where each network link communicatively couples a respective network node from among the plurality of network nodes to another respective network node from among the plurality of network nodes.

An example system includes a network switch and a plurality of server computers communicatively coupled to the first network switch. The network switch includes a first transceiver configured to transmit data according to a first maximum throughput, and each server computer includes a respective second transceiver configured to transmit data according to a second maximum throughput that is less than the first maximum throughput. The network switch is configured to transmit, using the first transceiver according to the first maximum throughput, first data including a plurality of optical subcarriers to each of the server computers. Each of the server computers is configured to receive, using a respective one of the second transceivers, the first data from the network switch, and extract, from the first data, a respective portion of the first data addressed to the server computer.

The digital-output temperature sensor includes a temperature sensor circuit, a current mirror circuit which makes a mirror current of a temperature detection current flow and pulls in a mirror current of a reference current to thereby output a first difference current from a first output node and output a second difference current from a second output node, a chopping circuit, and an A/D conversion circuit. The chopping circuit performs a chopping operation of making the mirror current of the reference current flow in a second state through a transistor of the current mirror circuit through which the mirror current of the temperature detection current flows in a first state, and making the mirror current of the temperature detection current flow in the second state through the transistor of the current mirror circuit through which the mirror current of the reference current flows in the first state.

Control rod drives include all-digital monitoring, powering, and controlling systems for operating the drives. Each controlling system includes distinct microprocessor-driven channels that independently monitor and handle control rod drive position information reported from multiple position sensors per drive. Controlling systems function as rod control and information systems with top-level hardware interfaced with nuclear plant operators other plant systems. The top-level hardware can receive operator instructions and report control rod position, as well as report errors detected using redundant data from the multiple sensors. Positional data received from each drive is multiplexed across plural, redundant channels to allow verification of the system using independent position data as well as operation of the system should a single channel or detector fail. Control rod drives are capable of positioning and detecting position of control elements in fine increments, such as 3-millimeter increments, with plural position sensors that digitally report drive status and position.

Example test methods and apparatus are described. One example method includes receiving an uplink radio frequency signal by a test device from a terminal device, where the uplink radio frequency signal is generated by superimposing at least two test signals, and each of the at least two test signal corresponds to one communication protocol. The test device extracts the at least two test signals from the uplink radio frequency signal. The test device separately tests the at least two test signals, and obtains an uplink test result of the terminal device.

A quantizer generates a thermometer coded signal from an analog voltage signal. Data weighted averaging (DWA) of the thermometer coded signal is accomplished by controlling the operation of a crossbar switch controlled by a switch control signal to generate an output DWA signal. The output DWA signal is latched to generate a latched output DWA signal which is processed along with bits of the thermometer coded input signal in feedback loop to generate the switch control signal. The latching of the output DWA signal is performed in an input register of a digital-to-analog converter which operates to convert the latched output DWA signal to a feedback analog voltage from which the analog voltage signal is generated. The switch control signal specifies a bit location for a beginning logic transition of the output DWA signal cycle based on detection of an ending logic transition of the latched DWA signal.

Systems formed by a multi-bit three-transistor (3T) memory cell (i.e., dynamic-analog RAM) are provided. The 3T memory cell includes: a read-access transistor M.sub.1 in electrical communication with a read bitline; a switch transistor M.sub.2 in electrical communication with the read-access transistor M.sub.1 a write-access transistor M.sub.3 in electrical communication with the read-access transistor M.sub.1 and a write bitline; and a memory node MEM in electrical communication between the read-access transistor M.sub.1 and the write-access transistor M.sub.3, wherein the memory node MEM is configured to store a 4-bit weight WE. An array of the 3T memory cells (i.e., dynamic-analog RAMs) may form a computing-in-memory (CIM) macro, and further form a convolutional neural network (CNN) accelerator by communicating with an application-specific integrated circuit (ASIC) which communicates with a global weight static random access memory and an activation static random access memory.

A phono-preamplifier for processing audio output signals from a turntable is powered by a variable voltage adapter such as a USB-C PD power supply adapter.