Embodiments are disclosed for moment estimation in high-speed electrical signal processing. An example apparatus includes a first attenuator configured to attenuate a first analog signal to be integrated so as to generate a first attenuated signal. The apparatus further includes a second attenuator configured to attenuate a second analog signal to be integrated so as to generate a second attenuated signal. The apparatus further includes a first slicer configured to directly receive the first attenuated signal from the first attenuator and to slice the first attenuated signal to generate a first quantized signal. The first slicer introduces Gaussian noise to the first attenuated signal. The apparatus further includes a second slicer configured to directly receive the second attenuated signal from the second attenuator and to slice the second attenuated signal to generate a second quantized signal. The second slicer introduces Gaussian noise to the second attenuated signal. The apparatus further includes an exclusive or (XOR) gate configured to receive the first quantized signal and the second quantized signal as input. The apparatus further includes an integrator configured to receive an output of the XOR gate, wherein an output of the integrator is used for moment estimation.

In described examples, a stochastic comparator includes a first comparator that compares an input signal and a primary threshold to generate a first signal. A second comparator compares the input signal and the primary threshold to generate a second signal. A decision block generates a control signal in response to the first signal, the second signal and a PRBS (pseudo random binary sequence) signal. A XOR gate generates a detection signal in response the first signal and the second signal.

In described examples, a stochastic comparator includes a first comparator that compares an input signal and a primary threshold to generate a first signal. A second comparator compares the input signal and the primary threshold to generate a second signal. A decision block generates a control signal in response to the first signal, the second signal and a PRBS (pseudo random binary sequence) signal. A XOR gate generates a detection signal in response the first signal and the second signal.

In described examples, a stochastic comparator includes a first comparator that compares an input signal and a primary threshold to generate a first signal. A second comparator compares the input signal and the primary threshold to generate a second signal. A decision block generates a control signal in response to the first signal, the second signal and a PRBS (pseudo random binary sequence) signal. A XOR gate generates a detection signal in response the first signal and the second signal.

In described examples, a stochastic comparator includes a first comparator that compares an input signal and a primary threshold to generate a first signal. A second comparator compares the input signal and the primary threshold to generate a second signal. A decision block generates a control signal in response to the first signal, the second signal and a PRBS (pseudo random binary sequence) signal. A XOR gate generates a detection signal in response the first signal and the second signal.

There is provided an analog-stochastic converter for converting an analog voltage signal into a pulse signal having a corresponding probability. The analog-stochastic converter is implemented using a threshold switching element and a simple logic circuit, thereby reducing a size of the analog-stochastic converter and enabling a low power operation thereof. In addition, in order to update a weight, instead of an analog signal, a probability signal is applied using the above-described analog-stochastic converter, thereby updating a weight in a fully-parallel manner in a synaptic element array having an intersection structure. Accordingly, it is possible to shorten a time for weight update.

In described examples, a stochastic comparator includes a first comparator that compares an input signal and a primary threshold to generate a first signal. A second comparator compares the input signal and the primary threshold to generate a second signal. A decision block generates a control signal in response to the first signal, the second signal and a PRBS (pseudo random binary sequence) signal. A XOR gate generates a detection signal in response the first signal and the second signal.

In described examples, a stochastic comparator includes a first comparator that compares an input signal and a primary threshold to generate a first signal. A second comparator compares the input signal and the primary threshold to generate a second signal. A decision block generates a control signal in response to the first signal, the second signal and a PRBS (pseudo random binary sequence) signal. A XOR gate generates a detection signal in response the first signal and the second signal.

Aspects of a method and system for a successive approximation analog-to-digital converter with dynamic search algorithms are provided. In some embodiments, a successive approximation analog-to-digital converter includes a digital-to-analog converter, a comparator, and a search and decode logice modules which cooperate to generate a digital output code representative of the analog input voltage based on a dynamic search algorithm. The dynamic search algorithms may alter a sequence of reference voltages used to successively approximate the analog input voltage based on one or more characteristics of the analog input voltage.

Aspects of a method and system for a successive approximation analog-to-digital converter with dynamic search algorithms are provided. In some embodiments, a successive approximation analog-to-digital converter includes a digital-to-analog converter, a comparator, and a search and decode logice modules which cooperate to generate a digital output code representative of the analog input voltage based on a dynamic search algorithm. The dynamic search algorithms may alter a sequence of reference voltages used to successively approximate the analog input voltage based on one or more characteristics of the analog input voltage.