The present disclosure provides a mixer circuit, a transmitter, and a communication device. The mixer circuit comprises an I-channel digital-to-analog converter, a Q-channel digital-to-analog converter, a low-pass filter, and a passive quadrature mixer, wherein the low-pass filter comprises an active device, so that an output admittance of the mixer circuit contains conductance dependent of frequency. The consistency between the gains of the mixer circuit at the upper sideband and the lower sideband can be improved.

The present disclosure provides a mixer circuit, a transmitter, and a communication device. The mixer circuit comprises an I-channel digital-to-analog converter, a Q-channel digital-to-analog converter, a low-pass filter, and a passive quadrature mixer, wherein the low-pass filter comprises an active device, so that an output admittance of the mixer circuit contains conductance dependent of frequency. The consistency between the gains of the mixer circuit at the upper sideband and the lower sideband can be improved.

A current to digital converter circuit has an integrator amplifier with an input adapted to receive a current signal and an output adapted to provide a voltage signal as a function of an integration of the current signal, a quantizer circuit with an input which is coupled to the output of the integrator amplifier and with an output adapted to provide a binary result signal as a function of a comparison of the voltage signal with at least a first reference voltage signal, a digital-to-analog converter circuit which is coupled in a switchable manner as a function of the binary result signal to the input of the integrator amplifier, and a controlled current source which is coupled to the output of the integrator amplifier via a first switch which is controlled as a function of the binary result signal such that an auxiliary current is supplied to the output of the integrator amplifier.

A current to digital converter circuit has an integrator amplifier with an input adapted to receive a current signal and an output adapted to provide a voltage signal as a function of an integration of the current signal, a quantizer circuit with an input which is coupled to the output of the integrator amplifier and with an output adapted to provide a binary result signal as a function of a comparison of the voltage signal with at least a first reference voltage signal, a digital-to-analog converter circuit which is coupled in a switchable manner as a function of the binary result signal to the input of the integrator amplifier, and a controlled current source which is coupled to the output of the integrator amplifier via a first switch which is controlled as a function of the binary result signal such that an auxiliary current is supplied to the output of the integrator amplifier.

A current output module includes a current output section configured to output a current, an AD conversion circuit configured to convert a detection voltage, which is a voltage according to the current output from the current output section, into a digital value, a controller configured to control a current output from the current output section on the basis of the digital value of the detection voltage output from the AD conversion circuit, and a reference voltage generator configured to generate a plurality of reference voltages. The controller includes a processor configured to cause the AD conversion circuit to convert each of the plurality of reference voltages into a digital value, and a corrector configured to calibrate the AD conversion circuit on the basis of each digital value obtained by conversion of the plurality of reference voltages.

A current output module includes a current output section configured to output a current, an AD conversion circuit configured to convert a detection voltage, which is a voltage according to the current output from the current output section, into a digital value, a controller configured to control a current output from the current output section on the basis of the digital value of the detection voltage output from the AD conversion circuit, and a reference voltage generator configured to generate a plurality of reference voltages. The controller includes a processor configured to cause the AD conversion circuit to convert each of the plurality of reference voltages into a digital value, and a corrector configured to calibrate the AD conversion circuit on the basis of each digital value obtained by conversion of the plurality of reference voltages.

Systems and methods for generating a radio frequency (RF) signal by a digital-to-analog converter (DAC) with transmission frequency within a wide transmission frequency range is described. An output reactance of the DAC coupled (directly or indirectly) to one or more antennas corresponds to the transmission frequency of the RF signals. Multiple embodiments of the DAC are described to include circuitry for tuning the output reactance of the DAC, and therefore, shifting a center frequency to select a transmission frequency range (from multiple transmission frequency ranges) for providing the RF signals.

Systems and methods for generating a radio frequency (RF) signal by a digital-to-analog converter (DAC) with transmission frequency within a wide transmission frequency range is described. An output reactance of the DAC coupled (directly or indirectly) to one or more antennas corresponds to the transmission frequency of the RF signals. Multiple embodiments of the DAC are described to include circuitry for tuning the output reactance of the DAC, and therefore, shifting a center frequency to select a transmission frequency range (from multiple transmission frequency ranges) for providing the RF signals.

Apparatus and methods for interfacing an integrated qubit control chip and a solid state qubit; detecting a qubit state with a transition pulse histogram; high resolution and high speed rectangular pulse generation; large-scale spin qubit state readout; and activity-based clock control.

Apparatus and methods for interfacing an integrated qubit control chip and a solid state qubit; detecting a qubit state with a transition pulse histogram; high resolution and high speed rectangular pulse generation; large-scale spin qubit state readout; and activity-based clock control.