Disclosed are a method and a device for improving an output accuracy of a digital-to-analog converter. The method includes: calculating an output error of the digital-to-analog converter based on output accuracy and an input error of the digital-to-analog converter; obtaining at least one of the output error, comparing the at least one output error against a preset threshold, and adjusting an integer input value of the digital-to-analog converter according to a comparison result.

A multiplier circuit can be fabricated within an integrated circuit and can draw a product output node to a voltage proportional to a product of first and second binary numbers received at two sets of inputs. The multiplier circuit includes a set of scaled capacitors, each capacitor of the set connected to an output of a multiplexor and to a local product output node. Each multiplexor is connected to the output of a multiplexor configured to generate an analog voltage in proportion to the value of the first binary number. Each scaled capacitor has a capacitance proportional to a significance of a respective bit of the second binary number. The multiplier circuit includes a reference capacitor connected to ground and the product output node, and a reset circuit configured to draw, in response to a RESET signal, the product output node to ground.

A multiplier circuit can be fabricated within an integrated circuit and can draw a product output node to a voltage proportional to a product of first and second binary numbers received at two sets of inputs. The multiplier circuit includes a set of scaled capacitors, each capacitor of the set connected to an output of a multiplexor and to a local product output node. Each multiplexor is connected to the output of a multiplexor configured to generate an analog voltage in proportion to the value of the first binary number. Each scaled capacitor has a capacitance proportional to a significance of a respective bit of the second binary number. The multiplier circuit includes a reference capacitor connected to ground and the product output node, and a reset circuit configured to draw, in response to a RESET signal, the product output node to ground.

System and method for processing a signal sampled from an output of a digital-analog converter. The method comprises: (a) transforming the input signal from time domain to frequency domain to obtain a signal having a plurality of bins; (b) estimating properties of a largest amplitude bin, except for direct current (DC) bin, in the input signal; (c) performing signal reconstruction in time domain based on the estimated properties to generate a reconstructed signal; (d) subtracting the estimated signal from the input signal to get a residual signal; (e) repeating steps (a)-(d) till a predetermined number of bins have been processed; (f) adding all the reconstructed signals and the last residual signal together to generate a sum signal; and (g) transforming the sum signal from the time domain to the frequency domain.

System and method for processing a signal sampled from an output of a digital-analog converter. The method comprises: (a) transforming the input signal from time domain to frequency domain to obtain a signal having a plurality of bins; (b) estimating properties of a largest amplitude bin, except for direct current (DC) bin, in the input signal; (c) performing signal reconstruction in time domain based on the estimated properties to generate a reconstructed signal; (d) subtracting the estimated signal from the input signal to get a residual signal; (e) repeating steps (a)-(d) till a predetermined number of bins have been processed; (f) adding all the reconstructed signals and the last residual signal together to generate a sum signal; and (g) transforming the sum signal from the time domain to the frequency domain.

A frequency synthesis system includes a memory to store first and second digital control word pairs that each include a first and second control word. A first DAC system generates an analog sampling signal having a first sampling frequency based on a fixed clock signal and the first control word of the first pair during a first time duration having a second sampling frequency based on the first control word of the second pair during a second time duration. A second DAC system generates an analog output signal based on the second control word of the first pair and the first sampling frequency at the first time duration and based on the second control word of the second pair and the second sampling frequency at the second time duration. The analog output signal has a same predetermined output frequency at both the first and second time durations.

A frequency synthesis system includes a memory to store first and second digital control word pairs that each include a first and second control word. A first DAC system generates an analog sampling signal having a first sampling frequency based on a fixed clock signal and the first control word of the first pair during a first time duration having a second sampling frequency based on the first control word of the second pair during a second time duration. A second DAC system generates an analog output signal based on the second control word of the first pair and the first sampling frequency at the first time duration and based on the second control word of the second pair and the second sampling frequency at the second time duration. The analog output signal has a same predetermined output frequency at both the first and second time durations.

A digital-to-analog conversion device and a compensation circuit are provided. A digital-to-analog conversion device includes an R2R digital-to-analog converter and a compensation circuit. The R2R digital-to-analog converter is configured to receive a digital code with a plurality of bits and receive a reference voltage, and convert the digital code into an analog output signal according to the reference voltage. The compensation circuit is configured to receive the digital code, decode the digital code to generate a compensation code with a plurality of bits, and compensate the current value of the reference current according to the compensation code to generate a compensated reference current. The compensated reference current has a constant current value corresponding to different digital codes to make the reference voltage constant.

A digital-to-analog conversion device and a compensation circuit are provided. A digital-to-analog conversion device includes an R2R digital-to-analog converter and a compensation circuit. The R2R digital-to-analog converter is configured to receive a digital code with a plurality of bits and receive a reference voltage, and convert the digital code into an analog output signal according to the reference voltage. The compensation circuit is configured to receive the digital code, decode the digital code to generate a compensation code with a plurality of bits, and compensate the current value of the reference current according to the compensation code to generate a compensated reference current. The compensated reference current has a constant current value corresponding to different digital codes to make the reference voltage constant.

A double-balanced radio-frequency (RF) mixing digital-to-analog converter (DAC) apparatus includes a load network, a first set of resistive DAC driver circuits and a first mixing core. The first mixing core can receive first RF input signals from the first set of resistive DAC driver circuits and can provide a first mixed signal to the load network. The first mixing core includes a first input differential pair coupled to two first cross-coupled differential pairs. The first input differential pair can receive first RF input signals at respective first input nodes. Each of the two first cross-coupled differential pairs can receive first positive and negative local oscillator (LO) signals at corresponding first input nodes. The first mixing core can mix the first RF input signals with the first positive and negative LO signals.