An example device comprises a digital-to-analog converter (DAC) comprising first and second transistors coupled to a first amplifier, the second transistor coupled to a first output of the DAC and to an output of the first amplifier, and third and fourth transistors coupled to the first amplifier and to a second output of the DAC, the third and fourth transistors switchably coupled to a voltage supply and to the first transistor. The device also comprises a first node coupled to the first output of the DAC and to a resistor. The device further includes a second node coupled to the second output of the DAC, and a second amplifier coupled to the second node and to the first transistor and switchably coupled to the third and fourth transistors. The device also comprises a comparator coupled to the first node.

An example device comprises a digital-to-analog converter (DAC) comprising first and second transistors coupled to a first amplifier, the second transistor coupled to a first output of the DAC and to an output of the first amplifier, and third and fourth transistors coupled to the first amplifier and to a second output of the DAC, the third and fourth transistors switchably coupled to a voltage supply and to the first transistor. The device also comprises a first node coupled to the first output of the DAC and to a resistor. The device further includes a second node coupled to the second output of the DAC, and a second amplifier coupled to the second node and to the first transistor and switchably coupled to the third and fourth transistors. The device also comprises a comparator coupled to the first node.

An FM-CW radar includes a high frequency circuit that receives a reflected wave from a target, and a signal processing unit that converts an analog signal generated by the high frequency circuit into a digital signal and detects at least a distance to the target and velocity of the target. The high frequency circuit includes a VCO that receives a modulation voltage from the signal processing unit and generates a frequency-modulated high frequency signal. The signal processing unit includes an LUT that stores default modulation control data. The signal processing unit calculates frequency information from phase information of output of the VCO, and updates the data stored in the LUT with correction data that is generated by using a result of the calculation.

Provided is an AD converter including a first AD converting unit in which pixel columns of a pixel array are divided into at least two groups, and that compares a first ramp signal and a first pixel signal output from a first group of the pixel columns and performs AD conversion on the first pixel signal; and a second AD converting unit that compares a second ramp signal and a second pixel signal output from a second group of the pixel columns and performs AD conversion on the second pixel signal, in which the first ramp signal is a signal of which a level is decreased with a constant slope over time in a D-phase period for detecting a signal level of a pixel signal, and the second ramp signal is a signal of which a level is increased with a constant slope over time in the D-phase period.

A system for converting a digital input signal into an analog output signal is provided, the system has at least three different signal paths with different but overlapping frequency ranges, at least three digital-to-analog converters, at least three analog filters, and a combiner unit. Each of the digital-to-analog converters is connected to at least one signal path, wherein the signals transmitted to the digital-to-analog converters are phase coherent. Each of the digital-to-analog converters is connected to a combiner unit, and each of the analog filters is associated with one of the digital-to-analog converters, wherein at least one of the digital-to-analog converters has a lower sampling rate than the sampling rate of at least two others of the digital-to-analog converters. Further, a method for converting a digital input signal into an analog output signal is shown.

A system for converting a digital input signal into an analog output signal is provided, the system has at least three different signal paths with different but overlapping frequency ranges, at least three digital-to-analog converters, at least three analog filters, and a combiner unit. Each of the digital-to-analog converters is connected to at least one signal path, wherein the signals transmitted to the digital-to-analog converters are phase coherent. Each of the digital-to-analog converters is connected to a combiner unit, and each of the analog filters is associated with one of the digital-to-analog converters, wherein at least one of the digital-to-analog converters has a lower sampling rate than the sampling rate of at least two others of the digital-to-analog converters. Further, a method for converting a digital input signal into an analog output signal is shown.

A method for improving threshold accuracy in an RFID-device through offset cancellation, and including the steps of providing a comparator including a first and a second amplifiers, providing a current output digital-to-analogue converter, AC-coupling in an RF-signal into the detector circuit, during a first phase, applying a signal based on the RF-signal into the first amplifier while a current of the DAC is set to zero, and applying a current of the DAC into the second amplifier while a signal based on the RF-signal is set to zero, during a second phase, applying the current of the DAC into the first amplifier while the signal based on the RF-signal is set to zero, and applying the signal based on the RF-signal into the second amplifier while the current of the DAC is set to zero.

An electronic device may include wireless circuitry having a mixer configured to receive an oscillating signal from oscillator circuitry. The oscillator circuitry can include a chain of buffer circuits sometimes referred to as oscillator driver circuitry. Transformers may be coupled at the input and output of each buffer circuit in the chain. Adjustable biasing circuits may be formed at the input of a selected buffer circuit in the chain of the buffer circuits. The adjustable biasing circuits can be digital-to-analog converters (DACs). The adjustable biasing circuits may be configured to apply a differential direct current (DC) offset voltage to the input of the selected buffer circuit. The differential DC offset voltage can have a value chosen to minimize a second harmonic component of the oscillator driver circuitry. Configured and operated in this way, a second harmonic conversion gain of the mixer can be reduced and can improve the transmit and receive performance of the wireless circuitry.

An electronic device may include wireless circuitry having a mixer configured to receive an oscillating signal from oscillator circuitry. The oscillator circuitry can include a chain of buffer circuits sometimes referred to as oscillator driver circuitry. Transformers may be coupled at the input and output of each buffer circuit in the chain. Adjustable biasing circuits may be formed at the input of a selected buffer circuit in the chain of the buffer circuits. The adjustable biasing circuits can be digital-to-analog converters (DACs). The adjustable biasing circuits may be configured to apply a differential direct current (DC) offset voltage to the input of the selected buffer circuit. The differential DC offset voltage can have a value chosen to minimize a second harmonic component of the oscillator driver circuitry. Configured and operated in this way, a second harmonic conversion gain of the mixer can be reduced and can improve the transmit and receive performance of the wireless circuitry.

Methods, systems, computer-readable media, and apparatuses for spurious information reduction in a data signal are presented. Some configurations include mixing a plurality of analog input signals with different corresponding local oscillator signals to generate a corresponding plurality of converted signals; generating, from each of the plurality of converted signals, a corresponding one of a plurality of sampled signals; frequency shifting at least one signal that is based on at least one of the plurality of sampled signals to obtain, from at least the plurality of sampled signals, a plurality of frequency-aligned signals; and performing a common-mode filtering operation, based on information from the plurality of frequency-aligned signals, to produce a digital output signal.