Patent classifications
H03M1/66
Piezoelectric magnetic digital to analog converter
The present invention provides a digital to analog conversion method and system that uses piezoelectric effect and magnetic induction to reconstruct the infinite analog values between discrete digital samples. This magnetic-piezoelectric armature delivers an output analog signal of a smooth continuous nature that provides a more faithful representation of the original analog signal. The method and system use mechanical movement, which is continuous by nature since there is no quantization in the different positions a moving object can assume between two spacial points, to construct the signal approximation between digital samples. The magnetic-piezoelectric armature uses a highly sensitive piezoelectric material that moves a magnet in the proximity of a wire coil to induce a voltage signal reproducing the original analog signal. The piezoelectric material expands and contracts following the changes in voltage between digital samples which induces a corresponding continuous analog voltage signal in the coil.
CONVERSION OF DIGITAL SIGNALS INTO SPIKING ANALOG SIGNALS
A digital signal may be converted into a spiking analog signal. A different constant current may be applied to each of a plurality of switch circuits. Each bit of the digital signal may be applied to a corresponding one of the plurality of switch circuits. Each switch circuit may apply the corresponding constant current to a common output when the corresponding bit has a predetermined value. Each switch circuit may not apply the corresponding constant current to the common output when the corresponding bit does not have the predetermined value. A common current may be applied at the common output to a spiking neuron circuit.
CONVERSION OF DIGITAL SIGNALS INTO SPIKING ANALOG SIGNALS
A digital signal may be converted into a spiking analog signal. A different constant current may be applied to each of a plurality of switch circuits. Each bit of the digital signal may be applied to a corresponding one of the plurality of switch circuits. Each switch circuit may apply the corresponding constant current to a common output when the corresponding bit has a predetermined value. Each switch circuit may not apply the corresponding constant current to the common output when the corresponding bit does not have the predetermined value. A common current may be applied at the common output to a spiking neuron circuit.
Dynamic power switching in current-steering DACS
Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit.
Dynamic power switching in current-steering DACS
Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit.
Dynamic exchange of electrical current control devices in a load current controller
In an example, a circuit for controlling at least two electronic switches in a parallel configuration between a power supply and a load. The circuit includes a control circuit to generate first and second control signals to control first and second electronic switches of the at least two electronic switches, and establish a conduction sequence of the first and second electronic switches using the first and second control signals. The circuit includes a detection circuit configured to detect a current flowing through a control terminal of the first electronic switch during a transition portion, wherein the circuit is configured to adjust the first control signal and establish the second portion of the conduction sequence in response to the detected current.
Dynamic exchange of electrical current control devices in a load current controller
In an example, a circuit for controlling at least two electronic switches in a parallel configuration between a power supply and a load. The circuit includes a control circuit to generate first and second control signals to control first and second electronic switches of the at least two electronic switches, and establish a conduction sequence of the first and second electronic switches using the first and second control signals. The circuit includes a detection circuit configured to detect a current flowing through a control terminal of the first electronic switch during a transition portion, wherein the circuit is configured to adjust the first control signal and establish the second portion of the conduction sequence in response to the detected current.
DA CONVERTER, DA CONVERTING METHOD, ADJUSTING APPARATUS, AND ADJUSTING METHOD
A DA converter to reduce second-order harmonic distortion more precisely with convenient configurations. ADA converter including: a DA converting unit to input reference voltage and a digital value and output an analog signal according to the digital value based on the reference voltage; and a superimposing unit to superimpose, on the reference voltage, a superimposing signal based on the analog signal that is output from the DA converting unit, and a DA converting method are provided. The DA converter may further include a setting input unit to input setting regarding at least one of a superimposing amount and a sign of an analog signal to be included in the superimposing signal. Also, an adjusting apparatus and an adjusting method to adjust the DA converter are provided.
CLOCK SKEW SUPPRESSION FOR TIME-INTERLEAVED CLOCKS
A time-interleaved clock circuit, including circuitry to provide multiple clock components of a sampling clock. The clock components are corrected by averaging pairs of the multiple clock components in order to output averaged signals. The time-interleaved clock is applied to data conversion in which input signals of the analog signal domain or of the digital signal domain are sampled based on the corrected clock components and converted to the digital signal domain or the analog signal domain, respectively.
DIGITAL-TO-ANALOG CONVERTERS HAVING A RESISTIVE LADDER NETWORK
According to an embodiment, a digital-to-analog converter may be provided. The digital-to-analog converter may include a resistive ladder network including a plurality of paths corresponding to bit currents, respectively. The digital-to-analog converter may include a switching circuit configured to include a plurality of weighted elements respectively coupled to the paths. The digital-to-analog converter may include a reference voltage setting circuit coupled to the weighted elements and the paths, and configured to minimize a variation of threshold voltages of the weighted elements.