The disclosure relates to a phase shifter having a first mode of operation and a second mode of operation, the phase shifter comprising a mixer stage configured to mix an oscillator signal with an analogue signal to provide a phase shifted signal, switching circuitry and a controller arranged to provide the analogue signal to the mixer stage as a voltage in the first mode of operation and as a current in the second mode of operation.

The disclosure relates to a phase shifter having a first mode of operation and a second mode of operation, the phase shifter comprising a mixer stage configured to mix an oscillator signal with an analogue signal to provide a phase shifted signal, switching circuitry and a controller arranged to provide the analogue signal to the mixer stage as a voltage in the first mode of operation and as a current in the second mode of operation.

The disclosure relates to a phase shifter having a first mode of operation and a second mode of operation, the phase shifter comprising a mixer stage configured to mix an oscillator signal with an analogue signal to provide a phase shifted signal, switching circuitry and a controller arranged to provide the analogue signal to the mixer stage as a voltage in the first mode of operation and as a current in the second mode of operation.

A multi-zone digital-to-analog device is provided with a digital-to-analog (D/A) stage having an input to accept a digital input signal with a data bandwidth of M Hertz (Hz), a clock input to accept a clock signal with a clock frequency of P Hz, and an output to supply an analog value having a bandwidth of M Hz. An upsampling stage has an input to accept the analog value and a clock input to accept the clock signal. The upsampling stage has a device bandwidth of L Hz to supply an analog output signal with a full power bandwidth of K Hz, where (P/2)=M and M<K<L. The upsampling stage supplies analog output signal images in a plurality of Nyquist zones. In one aspect, the D/A stage supplies N deinterleaved analog values having a combined bandwidth of M Hz, where N(P/2)=M.

A semiconductor device in which variations are controlled is provided. The semiconductor device has a function of converting a digital signal into an analog signal, and includes a digital-analog converter circuit, an amplifier circuit, first to fourth switches, a first output terminal, a second output terminal, and a power source. The amplifier circuit is configured to perform feedback control when the first switch and the fourth switch are on and the second switch and the third switch are off. The amplifier circuit is configured to perform comparison control when the first switch and the fourth switch are off and the second switch and the third switch are on; utilizing this, variations in the digital-analog converter circuit and the amplifier circuit are controlled.

A digital to time converter (DTC). The DTC includes a lookup table, a divider, a thermometric array and a switched capacitor array. The lookup table is configured to generate one or more corrections based on thermometric bits of an input signal. The divider is configured to generate a plurality of divider signals from an oscillator signal based on the one or more corrections. The thermometric array is configured to generate a medium approximation signal from the plurality of divider signals based on the one or more corrections. The switched capacitor array is configured to generate a digital delay signal from the medium approximation signal based on the one or more corrections and switched capacitor bits of the input signal.

The present disclosure relates to a source drive IC of liquid crystal panels. The source drive IC includes a digital signals module, a Gamma reference voltage module, a comparator, a power voltage module, a selector, a digital-to-analog converter (DAC) and a buffer amplifier. In addition, a driving method of liquid crystal panels may reduce the power consumption of the buffer amplifier to decrease the temperature of the source drive IC so as to enhance the reliability of the liquid crystal panel.

The present disclosure relates to a source drive IC of liquid crystal panels. The source drive IC includes a digital signals module, a Gamma reference voltage module, a comparator, a power voltage module, a selector, a digital-to-analog converter (DAC) and a buffer amplifier. In addition, a driving method of liquid crystal panels may reduce the power consumption of the buffer amplifier to decrease the temperature of the source drive IC so as to enhance the reliability of the liquid crystal panel.

A high-speed converter includes at least one converter among a first converter for converting an analog signal into a digital value; a second converter for converting a digital value into an analog signal; a third converter for converting an electrical signal into a digital signal; and a fourth converter for converting a digital signal into an electrical signal, and causes the at least one converter to operate by a method based on information acquired via a network.

A high-speed converter includes at least one converter among a first converter for converting an analog signal into a digital value; a second converter for converting a digital value into an analog signal; a third converter for converting an electrical signal into a digital signal; and a fourth converter for converting a digital signal into an electrical signal, and causes the at least one converter to operate by a method based on information acquired via a network.