A device includes a plurality of digital-to-analog converters (DACs), a multiplexer, a plurality of electrodes including a first electrode, and a plurality of direct current (DC) offset circuits including a first DC offset circuit. At least one of the plurality of electrodes is located along a lane for movement of an ion. The multiplexer has multiple inputs coupled to the plurality of DACs and multiple outputs including a first output. The first output is configured to provide a first voltage. The first DC offset circuit is coupled between the first output and the first electrode. The first DC offset circuit is configured to add a first DC offset voltage to either the first voltage or the first voltage amplified by a first gain. The first DC offset voltage is configurable.

A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.

A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.

Mixed-signal circuitry including a set of capacitive digital-to-analogue converter, CDAC, units for carrying out digital-to-analogue conversion operations to convert respective digital values into corresponding analogue values; and control circuitry, where: each CDAC unit includes an array of capacitors at least some of which are configured to be individually-switched dependent on the digital values, the capacitors configured to have nominal capacitances; a given capacitor of the array of capacitors in each of the CDAC units is a target capacitor; the set of CDAC units includes a plurality of sub-sets of CDAC units; at least one of the target capacitors per sub-set of CDAC units is a variable capacitor, controllable by the control circuitry to have any one of a plurality of nominal capacitances defined by the configuration of that capacitor.

Mixed-signal circuitry including a set of capacitive digital-to-analogue converter, CDAC, units for carrying out digital-to-analogue conversion operations to convert respective digital values into corresponding analogue values; and control circuitry, where: each CDAC unit includes an array of capacitors at least some of which are configured to be individually-switched dependent on the digital values, the capacitors configured to have nominal capacitances; a given capacitor of the array of capacitors in each of the CDAC units is a target capacitor; the set of CDAC units includes a plurality of sub-sets of CDAC units; at least one of the target capacitors per sub-set of CDAC units is a variable capacitor, controllable by the control circuitry to have any one of a plurality of nominal capacitances defined by the configuration of that capacitor.

A digital-to-analog converter and an operation method thereof are provided. The digital-to-analog converter includes a current source module, a decoder, a change indicator, and a random number generator. The decoder is coupled to the current source module and receives a digital input signal. The change indicator is coupled to the decoder and provides an indication signal to the decoder. The random number generator is coupled to the change indicator and provides a random number signal to the change indicator. The change indicator generates an indication signal according to the random number signal, and the decoder generates a control signal to the current source module according to the digital input signal and the indication signal, so that the current source module generates an analog output signal corresponding to the digital input signal according to the control signal.

A cabin management system is described. The cabin management system includes a housing. The housing is configured to receive one or more modules. The modules may be detached and reattached to the housing. The modules may be rearranged to achieve a desired layout of touchscreens, audio converter, and input/output ports. The modules may include a geometry which provides a flush-mounting between the housing and the modules. The flush-mounting may prevent a passenger from accessing the cavity defined by the housing. The audio converter includes a digital-to-analog converter and an audio jack. The digital-to-analog converter converts an uncompressed digital audio signal to an analog audio signal. The audio jack receives a stereo analog signal and outputs the stereo analog signal to an audio plug.

A cabin management system is described. The cabin management system includes a housing. The housing is configured to receive one or more modules. The modules may be detached and reattached to the housing. The modules may be rearranged to achieve a desired layout of touchscreens, audio converter, and input/output ports. The modules may include a geometry which provides a flush-mounting between the housing and the modules. The flush-mounting may prevent a passenger from accessing the cavity defined by the housing. The audio converter includes a digital-to-analog converter and an audio jack. The digital-to-analog converter converts an uncompressed digital audio signal to an analog audio signal. The audio jack receives a stereo analog signal and outputs the stereo analog signal to an audio plug.

The current disclosure is related to a column and line digital-to-analog converter (DAC) with a hybrid coupler for generating quadrature analog signals. The DAC may include an array of unit power amplifiers (cells). A first portion of the cells of the array may be coupled to a first column decoder to receive in-phase components of digital signals and a second portion of the cells may be coupled to a second column decoder to receive quadrature components of the digital signals. The first portion of the cells of the array may generate in-phase components of analog signals and the second portion of the cells of the array may generate quadrature components of the analog signals. A hybrid coupler of the DAC may receive the in-phase and quadrature components of the analog signals with a similar phase, delay the quadrature components by a phase delay (e.g., 90 degrees), and output the resulting analog signals.

Capacitive digital-to-analog converters (DACs) with shaped output current are disclosed. In certain embodiments, a capacitive DAC converter cell for a capacitive DAC includes a capacitor connected between an output terminal and an internal node, a first current source, a first switch connected in series with the first current source between the internal node and a first voltage, a second current source, a second switch connected in series with the second current source between the internal node and a second voltage, a third switch connected between the internal node and the first voltage, and a fourth switch connected between the internal node and the second voltage.