H03M1/66

TIME-DOMAIN MULTIPLEXING OF QUANTUM BIT CONTROL SIGNALS
20240412089 · 2024-12-12 ·

A device comprises a control circuit configured to control a plurality of quantum bits. The control circuit comprises a digital-to-analog converter circuit and switching circuitry coupled to an output of the digital-to-analog converter circuit. The switching circuitry is responsive to switch control signals to selectively connect the output of the digital-to-analog converter circuit to one or more of a plurality of signal paths to generate control signals to control the plurality of quantum bits.

TIME-DOMAIN MULTIPLEXING OF QUANTUM BIT CONTROL SIGNALS
20240412089 · 2024-12-12 ·

A device comprises a control circuit configured to control a plurality of quantum bits. The control circuit comprises a digital-to-analog converter circuit and switching circuitry coupled to an output of the digital-to-analog converter circuit. The switching circuitry is responsive to switch control signals to selectively connect the output of the digital-to-analog converter circuit to one or more of a plurality of signal paths to generate control signals to control the plurality of quantum bits.

Radio frequency transmitter with dynamic impedance matching for high linearity

Certain aspects of the present disclosure are directed to a radio frequency digital-to-analog converter (RFDAC). The RFDAC generally includes a plurality of digital-to-analog (DAC) unit cells. At least one DAC unit cell is capable of being configured in an active state or in a sleep state. For the at least one DAC unit cell, an output impedance of the DAC unit cell in the active state is equal to an output impedance of the DAC unit cell in the sleep state.

Radio frequency transmitter with dynamic impedance matching for high linearity

Certain aspects of the present disclosure are directed to a radio frequency digital-to-analog converter (RFDAC). The RFDAC generally includes a plurality of digital-to-analog (DAC) unit cells. At least one DAC unit cell is capable of being configured in an active state or in a sleep state. For the at least one DAC unit cell, an output impedance of the DAC unit cell in the active state is equal to an output impedance of the DAC unit cell in the sleep state.

Comparator and analog to digital converter

To prevent occurrence of an input voltage dependent error due to an input parasitic capacitance. A comparator includes: a first transistor and a second transistor that include two sources connected to each other, two gates to which a differential input signal pair are input, and two drains that output a differential output signal pair corresponding to a difference signal of the differential input signal pair; a third transistor that is connected between both the sources of the first transistor and the second transistor and a first reference voltage node, the third transistor being switched on or off in accordance with logic of a first signal; and a fourth transistor that is connected between both the sources of the first transistor and the second transistor and a second reference voltage node, the fourth transistor being switched on or off in accordance with logic of a second signal having logic different from the logic of the first signal.

SPLIT PASS DEVICE APPLICATIONS FOR DAC SUPPLY SYSTEMS

The present disclosure relates to power management for digital-to-analog converters (DACs). As electronic devices and the components therein become increasingly smaller to satisfy the desire for more compact/portable devices, the operating voltage may be reduced to reduce the likelihood of shorts and/or voltage/current bleeds. To maintain comparable power output with the reduced operating voltage, the current may increase proportionally to the decrease in voltage. Consequently, in scaled devices and applications, high-current low-voltage regulators may be beneficial. As such, a low-dropout regulator (LDO) including one or more operational amplifiers and multiple pass devices may be implemented between a power supply and the DAC to regulate the power supply to the DAC. Moreover, the LDO may include one or more feedback loops to maintain a desired voltage regulation of the pass devices.

SPLIT PASS DEVICE APPLICATIONS FOR DAC SUPPLY SYSTEMS

The present disclosure relates to power management for digital-to-analog converters (DACs). As electronic devices and the components therein become increasingly smaller to satisfy the desire for more compact/portable devices, the operating voltage may be reduced to reduce the likelihood of shorts and/or voltage/current bleeds. To maintain comparable power output with the reduced operating voltage, the current may increase proportionally to the decrease in voltage. Consequently, in scaled devices and applications, high-current low-voltage regulators may be beneficial. As such, a low-dropout regulator (LDO) including one or more operational amplifiers and multiple pass devices may be implemented between a power supply and the DAC to regulate the power supply to the DAC. Moreover, the LDO may include one or more feedback loops to maintain a desired voltage regulation of the pass devices.

MUX and DEMUX circuits with improved bandwidth
12166501 · 2024-12-10 · ·

A combinational circuit (e.g., multiplexer or demultiplexer) comprises a sub-circuit that comprises first and second current paths from an input of the combinational circuit to an output of the combinational circuit, such that substantially all input current at the input of the combinational circuit is conducted by the sub-circuit via the first and second current paths to the output of the combinational circuit. The first current path comprises a first inductor and a first switch; and the second current path comprises a second inductor and a second switch. The first inductor is part of an output LC transmission line of the sub-circuit; the second inductor is part of an input LC transmission line of the sub-circuit; and the first and second inductors are sized such that parasitic capacitances of the first and second switches are substantially absorbed by the input and output LC transmission lines.

Digital-to-analog converter glitch reduction techniques

A digital technique to reduce or minimize switching in a DAC by using a partial DAC data ignore switching mode. In the partial DAC data ignore switching mode, a control circuit compares first and second data, such a first and second digital words, and operates corresponding switches only when the first data differ from the second data. The techniques are applicable to many types of DACs, including voltage output DACs, current output DACs, variable resistance DACs, digital rheostats, digital potentiometers, digiPOTs.

DEVICE FOR CAPTURING VOLTAGE-BASED EVENTS IN MOTOR VEHICLES
20240402253 · 2024-12-05 ·

A device capable of detecting and capturing both cranking and operating events is provided. The device uses the same components to detect operating voltage for either electric or combustion vehicles, and to detect and facilitate capturing cranking events.