The present invention relates to a digital-analog conversion method and device for adjusting a reference current to be used in a digital-analog conversion, by using a common mode feedback device, and the digital-analog conversion method of the present invention comprises the steps of: generating a reference current by receiving a reference voltage; converting a digital signal into an analog signal by receiving the generated reference current; detecting a common mode voltage, which is the average value of a both-end voltage of the converted analog signal; comparing the detected common mode voltage with the reference voltage; generating a feedback signal on the basis of the comparison result; and adjusting the reference current according to the generated feedback signal.

A method comprising acquiring an analog first sound signal, performing analog-to-digital conversion on the first sound signal to generate a digital second sound signal, performing reverberation processing, at a system bottom layer, on the second sound signal to generate a digital third sound signal, performing digital sound mixing processing on the third sound signal and a background sound signal sent from an application layer to generate a digital fourth sound signal, performing digital-to-analog conversion on the fourth sound signal to generate an analog fifth sound signal, performing analog sound mixing processing on the first sound signal and the fifth sound signal to generate an analog sixth sound signal, and playing the sixth sound signal.

A programmable temperature compensated voltage reference is disclosed. In an exemplary embodiment, an apparatus includes a digital-to-analog converter (DAC) that uses a reference voltage and a code to generate a DAC output voltage. The apparatus also includes a temperature compensator that uses a temperature measurement (T) and the DAC code to generate a temperature compensation signal. The temperature compensation signal is represented by a third order polynomial equation. The apparatus also includes a signal combiner that combines the DAC output voltage and the temperature compensation signal to generate a temperature compensated programmable reference voltage.

An antenna arrangement configured for digital beam-forming of a transmit signal comprising; a number N>1 of digital to analog converters, DACs, each of the N DACs being arranged to receive one respective digital transmit signal component, and to convert and output an analog transmit signal component, each of the N DACs having a respective resolution below a resolution required to fulfill a regulatory radio requirement in an interchangeable antenna arrangement arranged for transmission by a single antenna element connected to a single DAC; and N antenna elements, each of the N antenna elements being configured to receive one respective analog transmit signal component and to transmit the analog transmit signal component as part of the digitally beam-formed transmit signal.

Noise and distortion reduction in a signal processed through analog circuitry includes providing noise reduction circuitry to reduce signal noise generated by at least one analog circuit element. The noise reduction circuitry is adaptively configured to adjust a rate to apply noise reduction to the signal without introducing unwanted distortion. Distortion reduction circuitry is adaptively configured to adjust a rate to apply distortion reduction to the signal without introducing unwanted noise. The signal is processed through the analog circuitry using the adaptively configured noise reduction circuitry and adaptively configured distortion reduction circuitry to reduce both noise and distortion in the signal.

Described herein are related to a device including a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal. In one aspect, the device includes a first circuit configured to generate a first signal. In one aspect, the device includes a second circuit coupled to the first circuit. The second circuit may be configured to generate a second signal, based on the first signal. The second signal may have a first edge according to the first signal. In one aspect, the device includes a third circuit coupled to the second circuit. The third circuit may be configured to generate a third signal having a second edge, in response to the first edge of the second signal. In one aspect, an amplitude of the third signal may correspond to one bit.

A method for testing a DAC comprising controlling the DAC digitally to cause it to produce a known desired analogue output, for example a fixed amplitude sine wave; determining the duration of fixed voltage segments of the actual output of the DAC and using the duration of the fixed voltage segments to assess or determine performance of the DAC.

A method for testing a DAC comprising controlling the DAC digitally to cause it to produce a known desired analogue output, for example a fixed amplitude sine wave; determining the duration of fixed voltage segments of the actual output of the DAC and using the duration of the fixed voltage segments to assess or determine performance of the DAC.

A self-healing data converter system including a data converter; a parametric function module coupled to the data converter to receive a target performance requirement for a data converter and produce a set of function values to the data converter; an assistant module that captures data converter performance under one or more stress conditions; and a processing module coupled to the data converter to stress the data converter in accordance with one or more predetermined parameters and based on the target performance requirement and data converter performance, the processing module determines new parameters based on a self-healing method and applies the new parameters to produce a new set of function values for the data converter until a predetermined threshold is met to adaptively self-heal the data converter to changed conditions.

Methods and devices are provided in which a first parameter partial value (p1) is stored in a first memory (12) and a second parameter partial value (p2) is stored in a second memory (13). A parameter value (p) of a parameter can then be obtained by combining the first parameter partial value (p1) with the second parameter partial value (p2).