A radio frequency transmitter includes a digital-to-analog converter, a passive network, two buffers, a frequency mixer, and a power amplifier. Two output ends of the digital-to-analog converter are respectively coupled to two input nodes of the passive network, and the two output ends of the digital-to-analog converter are respectively coupled to input ends of the two buffers. Output ends of the two buffers are respectively coupled to two input ends of the frequency mixer. An output end of the frequency mixer is coupled to an input end of the power amplifier. An output end of the power amplifier is coupled to an antenna. The passive network is configured to perform filtering processing on an input current signal, and convert the current signal into a voltage signal.

A radio frequency transmitter includes a digital-to-analog converter, a passive network, two buffers, a frequency mixer, and a power amplifier. Two output ends of the digital-to-analog converter are respectively coupled to two input nodes of the passive network, and the two output ends of the digital-to-analog converter are respectively coupled to input ends of the two buffers. Output ends of the two buffers are respectively coupled to two input ends of the frequency mixer. An output end of the frequency mixer is coupled to an input end of the power amplifier. An output end of the power amplifier is coupled to an antenna. The passive network is configured to perform filtering processing on an input current signal, and convert the current signal into a voltage signal.

An apparatus includes analog-to-digital conversion (ADC) circuitry, digital processing logic, and digital-to-analog conversion (DAC) circuitry. The ADC circuitry is coupled to digitize multiple analog input signals so as to generate digital samples. The digital processing logic is configured to extract, from the digital samples, one or more first digital signals corresponding to a first selected subset of the analog input signals, and one or more second digital signals corresponding to a second selected subset of the analog input signals. The digital processing logic is further configured to output the one or more first digital signals to a digital medical instrument. The DAC circuitry is coupled to convert the one or more second digital signal into one or more analog output signals, and to output the one or more analog output signals to an analog medical instrument.

An apparatus includes analog-to-digital conversion (ADC) circuitry, digital processing logic, and digital-to-analog conversion (DAC) circuitry. The ADC circuitry is coupled to digitize multiple analog input signals so as to generate digital samples. The digital processing logic is configured to extract, from the digital samples, one or more first digital signals corresponding to a first selected subset of the analog input signals, and one or more second digital signals corresponding to a second selected subset of the analog input signals. The digital processing logic is further configured to output the one or more first digital signals to a digital medical instrument. The DAC circuitry is coupled to convert the one or more second digital signal into one or more analog output signals, and to output the one or more analog output signals to an analog medical instrument.

The present invention is a modular signal converting apparatus and method, and particularly, discloses a signal converting apparatus, which is modularized for playback of digital contents and is usable while being combined with another electric device.

The present invention is a modular signal converting apparatus and method, and particularly, discloses a signal converting apparatus, which is modularized for playback of digital contents and is usable while being combined with another electric device.

An acquisition stage receives a digital input signal and generates therefrom a first digital signal and a second digital signal complementary thereto. First and second processing stages receive the first and second digital signals and generate therefrom first and second analog signals in time with first and second complementary clock signals. An output stage generates an internal clock signal equivalent to one of: the first clock signal phase shifted by a duration of a transient occurring during a period of the first clock signal, or the second clock signal phase shifted by a duration of a transient occurring during a period of the second clock signal. The output stage produces an analog output signal equal to the first analog signal when the internal clock signal is at a first logic level, and equal to the second analog signal when the internal clock signal is at a second logic level.

A digital to analog converter (DAC) includes a plurality of DAC transistor devices having an input side configured to be selectively coupled to a system voltage based on a digital input signal and an output side configured to provide an analog output signal, a plurality of non-DAC transistor devices coupled to the input side of the DAC transistor devices, the non-DAC transistor devices configured as variable resistances, and a control circuit configured to adjust a bias of the non-DAC transistor devices.

A digital to analog converter (DAC) includes a plurality of DAC transistor devices having an input side configured to be selectively coupled to a system voltage based on a digital input signal and an output side configured to provide an analog output signal, a plurality of non-DAC transistor devices coupled to the input side of the DAC transistor devices, the non-DAC transistor devices configured as variable resistances, and a control circuit configured to adjust a bias of the non-DAC transistor devices.

A source driver includes a digital-to-analog converter configured to receive a data signal, convert the received data signal into an analog signal, and output the analog signal, an output unit including amplifiers configured to amplify the analog signal, a control signal provision unit configured to output at least one control signal based on or in response to a first bias signal, at least one level shifter configured to shift a level of the control signal(s) based on or in response to a second bias signal having a higher voltage than the first bias signal and output at least one level-shifted control signal, and a protector configured to detect a voltage of the first bias signal and turn off the amplifiers and the level shifter when the detected voltage of the first bias signal is less than a predetermined reference voltage.