One example relates to a monitoring circuit that includes a capacitive digital-to-analog converter that receives a binary code, a reference voltage, a monitored voltage, and a ground reference, the capacitive digital-to-analog converter outputting an analog signal based on the binary code, the reference voltage, the monitored voltage, and the ground reference. The monitoring circuit further includes a comparator including a first input coupled to receive the analog signal and a second input coupled to the reference voltage, the comparator comparing the analog signal to the reference voltage and outputting a comparator signal based on the comparison. The monitoring circuit yet further includes a binary code generator that generates the binary code based on the comparator signal, the binary code approximating a magnitude of the monitored voltage.

A data driving integrated circuit of the present embodiment may include a digital to analog converter configured to change a digital signal into an analog signal and an amplifier configured to receive the analog signal through an input terminal and output a data voltage to a pixel connected to a data line, wherein the amplifier may receive, as feedback, one of a plurality of output signals from a plurality of output terminals.

A data driving integrated circuit of the present embodiment may include a digital to analog converter configured to change a digital signal into an analog signal and an amplifier configured to receive the analog signal through an input terminal and output a data voltage to a pixel connected to a data line, wherein the amplifier may receive, as feedback, one of a plurality of output signals from a plurality of output terminals.

A multiplexer (MUX) calibration system includes main MUX circuitry, first replica MUX circuitry, digital-to-analog (DAC) circuitry, detection circuitry, and control circuitry. The main MUX circuitry receives clock signals and outputs a first data signal based on the clock signals. The first replica MUX circuitry receives the clock signals and outputs a second data signal based on the clock signals. The DAC circuitry generates an offset voltage. The detection circuitry receives the second data signal and the offset voltage and generates a first error signal based on one or more of the second data signal and the offset voltage. The control circuitry receives the first error signal and generates a first control signal indicating an adjustment to the clock signals.

A multiplexer (MUX) calibration system includes main MUX circuitry, first replica MUX circuitry, digital-to-analog (DAC) circuitry, detection circuitry, and control circuitry. The main MUX circuitry receives clock signals and outputs a first data signal based on the clock signals. The first replica MUX circuitry receives the clock signals and outputs a second data signal based on the clock signals. The DAC circuitry generates an offset voltage. The detection circuitry receives the second data signal and the offset voltage and generates a first error signal based on one or more of the second data signal and the offset voltage. The control circuitry receives the first error signal and generates a first control signal indicating an adjustment to the clock signals.

Methods, apparatus, systems and articles of manufacture for wideband and fast chirp generation for radar systems are disclosed herein. An example apparatus includes a phase digital-to-analog converter to convert a digital input that specifies at least one of a phase modulation or a frequency modulation into an analog output, and to generate a phase modulated output centered on an intermediate frequency. The example apparatus also includes a frequency multiplier to frequency multiply the phase modulated output centered on the intermediate frequency by a multiplication factor to generate a chirp signal.

An amplifier circuit may include an isolated amplifier circuit, disposed on a high voltage side of the amplifier circuit, and arranged to generate an isolated output signal. The amplifier circuit may include a first optocoupler circuit, disposed to receive the isolated output signal from the isolated amplifier circuit and an output amplifier circuit, disposed on a low voltage side of the amplifier circuit, and coupled to receive an optical output signal from the optocoupler circuit. The amplifier circuit may also include a calibration circuit, coupled to the output amplifier circuit, to generate a calibration initiation signal, and a second optocoupler circuit, disposed to receive the calibration initiation signal, and to output a switch signal, wherein a reference voltage is output to the isolated amplifier circuit.

An amplifier circuit may include an isolated amplifier circuit, disposed on a high voltage side of the amplifier circuit, and arranged to generate an isolated output signal. The amplifier circuit may include a first optocoupler circuit, disposed to receive the isolated output signal from the isolated amplifier circuit and an output amplifier circuit, disposed on a low voltage side of the amplifier circuit, and coupled to receive an optical output signal from the optocoupler circuit. The amplifier circuit may also include a calibration circuit, coupled to the output amplifier circuit, to generate a calibration initiation signal, and a second optocoupler circuit, disposed to receive the calibration initiation signal, and to output a switch signal, wherein a reference voltage is output to the isolated amplifier circuit.

The present invention is a computationally-efficient compensator for removing nonlinear distortion. The compensator operates in a digital post-compensation configuration for linearization of devices or systems such as analog-to-digital converters and RF receiver electronics. The compensator also operates in a digital pre-compensation configuration for linearization of devices or systems such as digital-to-analog converters, RF power amplifiers, and RF transmitter electronics. The multi-dimensional compensator effectively removes linear and nonlinear distortion in these systems by accurately modeling the state of the device by tracking multiple functions of the input, including but not limited to present signal value, delay function, derivative function (including higher order derivatives), integral function (including higher order integrals), signal statistics (mean, median, standard deviation, variance), covariance function, power calculation function (RMS or peak), or polynomial functions. The multi-dimensional compensator can be adaptively calibrated using simple arithmetic operations that can be completed with low processing requirements and quickly to track parameters that rapidly change over time, temperature, power level such as in frequency-hopping systems.

A display compensation circuit includes a driver circuit including a digital-to-analog converter (DAC), the driver circuit configured to drive pixels of a display panel; and a compensation circuit including a current-mode sensing circuit and a reference current generator circuit, the compensation circuit configured to determine a value to compensate for pixel variations across the display panel, the reference current generator circuit configured to generate a reference current using the DAC of the driver circuit.