Apparatuses and methods for power amplification and signal transmission using complex delta-sigma modulation are disclosed. In one embodiment, a complex delta sigma modulator unit comprising a complex polar quantizer within an integrator loop is disclosed. The complex polar quantizer quantizes the envelope of a complex integrated signal and produces a complex quantized output signal of substantially constant envelope. The complex quantized output signal is used in deriving a complex feedback signal within the integrator loop of the complex DSM. The complex quantized output signal may be used in driving a power amplifier substantially at saturation. In some embodiments, an adjacent channel power ratio (ACPR) enhancement technique is used to reduce the quantization noise in the complex quantized output signal.

Apparatuses and methods for power amplification and signal transmission using complex delta-sigma modulation are disclosed. In one embodiment, a complex delta sigma modulator unit comprising a complex polar quantizer within an integrator loop is disclosed. The complex polar quantizer quantizes the envelope of a complex integrated signal and produces a complex quantized output signal of substantially constant envelope. The complex quantized output signal is used in deriving a complex feedback signal within the integrator loop of the complex DSM. The complex quantized output signal may be used in driving a power amplifier substantially at saturation. In some embodiments, an adjacent channel power ratio (ACPR) enhancement technique is used to reduce the quantization noise in the complex quantized output signal.

Provided are a wireless access system provided with a remote unit capable of handling a high-frequency region without being made complicated, and a control method for the same. A wireless access system according to the present invention is provided with: a center unit (1); and a remote unit (3) that converts a baseband signal generated by the center unit (1) into a high-frequency signal and emits the high-frequency signal from an antenna (12). The center unit (1) includes a 1-bit modulator (5) that converts the baseband signal into a 1-bit signal on the basis of a generated clock signal and outputs the 1-bit signal. The remote unit (3) includes: a local generation unit (10) that extracts the clock signal from the 1-bit signal output from the center unit (1), and generates a local signal using the extracted clock signal as a reference signal; a filter (13) that extracts a desired band component from the 1-bit signal; and an up-converter (14) that converts, using the local signal, an output signal of the filter into a high-frequency signal.

Provided are a wireless access system provided with a remote unit capable of handling a high-frequency region without being made complicated, and a control method for the same. A wireless access system according to the present invention is provided with: a center unit (1); and a remote unit (3) that converts a baseband signal generated by the center unit (1) into a high-frequency signal and emits the high-frequency signal from an antenna (12). The center unit (1) includes a 1-bit modulator (5) that converts the baseband signal into a 1-bit signal on the basis of a generated clock signal and outputs the 1-bit signal. The remote unit (3) includes: a local generation unit (10) that extracts the clock signal from the 1-bit signal output from the center unit (1), and generates a local signal using the extracted clock signal as a reference signal; a filter (13) that extracts a desired band component from the 1-bit signal; and an up-converter (14) that converts, using the local signal, an output signal of the filter into a high-frequency signal.

A signal processing apparatus includes: a difference signal acquirer configured to obtain a difference signal reflecting a change in an input signal at a preset time interval based on a reference signal; a signal amplifier configured to amplify the difference signal; and a signal restorer configured to generate an output signal by converting the amplified difference signal to a digital signal and the digital signal.

A signal processing apparatus includes: a difference signal acquirer configured to obtain a difference signal reflecting a change in an input signal at a preset time interval based on a reference signal; a signal amplifier configured to amplify the difference signal; and a signal restorer configured to generate an output signal by converting the amplified difference signal to a digital signal and the digital signal.

A multibit flash quantizer circuit, such as included as a portion of delta-sigma conversion circuit, can be operated in a dynamic or configurable manner. Information indicative of at least one of an ADC input slew rate or a prior quantizer output code can be used to establish a flash quantizer conversion window. Within the selected conversion window, comparators in the quantizer circuit can be made active. Comparators outside the conversion window can be made dormant, such as depowered or biased to save power. An output from such dormant converters can be preloaded and latched. In this manner, full resolution is available without requiring that all comparator circuits within the quantizer remain active at all times.

A multibit flash quantizer circuit, such as included as a portion of delta-sigma conversion circuit, can be operated in a dynamic or configurable manner. Information indicative of at least one of an ADC input slew rate or a prior quantizer output code can be used to establish a flash quantizer conversion window. Within the selected conversion window, comparators in the quantizer circuit can be made active. Comparators outside the conversion window can be made dormant, such as depowered or biased to save power. An output from such dormant converters can be preloaded and latched. In this manner, full resolution is available without requiring that all comparator circuits within the quantizer remain active at all times.

A failure determination circuit includes a first A/D conversion circuit that continuously A/D converts a first analog signal based on a first physical quantity measurement signal, a switching circuit that receives a plurality of signals including a second analog signal based on the first physical quantity measurement signal and a first reference voltage and outputs the plurality of signals in a time division manner, a second A/D conversion circuit that A/D converts the output of the switching circuit, and a determination circuit, and the determination circuit determines a failure of the first A/D conversion circuit using a signal based on a first digital signal obtained by A/D converting the first analog signal by the first A/D conversion circuit and a signal based on a second digital signal obtained by A/D converting the second analog signal by the second A/D conversion circuit.

A failure determination circuit includes a first A/D conversion circuit that continuously A/D converts a first analog signal based on a first physical quantity measurement signal, a switching circuit that receives a plurality of signals including a second analog signal based on the first physical quantity measurement signal and a first reference voltage and outputs the plurality of signals in a time division manner, a second A/D conversion circuit that A/D converts the output of the switching circuit, and a determination circuit, and the determination circuit determines a failure of the first A/D conversion circuit using a signal based on a first digital signal obtained by A/D converting the first analog signal by the first A/D conversion circuit and a signal based on a second digital signal obtained by A/D converting the second analog signal by the second A/D conversion circuit.