An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.

An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.

An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.

An embodiment of a semiconductor package apparatus may include technology to load compressed symbols in a data stream into a first content accessible memory, break a serial dependency of the compressed symbols in the compressed data stream, and decode more than one symbol per clock. Other embodiments are disclosed and claimed.

An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.

An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.

A PAM-4 communication process divides a full burst of raw data into two half bursts, extracts a bit from each half burst and communicating the extracted bit on a DBI line, and encodes the remaining bits of the half burst to avoid maximum transitions between PAM-4 symbols on a data line.

Optical encoders for encoding signed, real numbers using optical fields are described. The optical fields may be detected using coherent detection, without the need for independent phase and amplitude control. This encoding technique enables the use of simple and non-ideal modulators (e.g., modulators that provide neither pure phase nor pure amplitude modulation) for high-precision encoding. A photonic system implementing optical encoding techniques may include a modulator configured to be driven by a single electrical modulating signal and a coherent receiver. An optical transformation unit optically coupled between the modulator and the coherent receiver may transform the phase and/or the intensity of the modulated optical field. The optical encoding techniques described herein may be used in a variety of contexts, including high-speed telecommunications, on chip-phase sensitive measurements for sensing, communications and computing, and optical machine learning.

Optical encoders for encoding signed, real numbers using optical fields are described. The optical fields may be detected using coherent detection, without the need for independent phase and amplitude control. This encoding technique enables the use of simple and non-ideal modulators (e.g., modulators that provide neither pure phase nor pure amplitude modulation) for high-precision encoding. A photonic system implementing optical encoding techniques may include a modulator configured to be driven by a single electrical modulating signal and a coherent receiver. An optical transformation unit optically coupled between the modulator and the coherent receiver may transform the phase and/or the intensity of the modulated optical field. The optical encoding techniques described herein may be used in a variety of contexts, including high-speed telecommunications, on chip-phase sensitive measurements for sensing, communications and computing, and optical machine learning.

A system that receives a line encoded data stream from a source. The system has a de-serializer for de-serializing a line encoded data stream to generate a raw parallel data stream. The system has a serializer for serializing the raw parallel data stream. The system has a parallel data generator configured to generate another raw parallel data stream. The system has reconfigurable circuitry for communicating the raw parallel data stream to the serializer in a configuration and communicating the other parallel data stream in another configuration.