Patent classifications
H03M7/02
COMPRESSION AND DECOMPRESSION ENGINES AND COMPRESSED DOMAIN PROCESSORS
Compressed domain processors configured to perform operations on data compressed in a format that preserves order. The Compressed domain processors may include operations such as addition, subtraction, multiplication, division, sorting, and searching. In some cases, compression engines for compressing the data into the desired formats are provided.
POWER-BASED DECODING OF DATA RECEIVED OVER AN OPTICAL COMMUNICATION PATH
A system for transmitting data over an optical communication path is configured to receive data to be encoded in a bitstream for transmission using an optical communication path and encodes the received data to obtain a bitstream. The system is further configured to determine that the bitstream includes a sequence of consecutive bits, and obtain a power level at which to transmit a portion of the bitstream based on a count of the consecutive bits in the sequence. The system may be configured to selectively activate a light source at a power level according to a modulation scheme to optically transmit the portion of the bitstream at the power level.
POWER-BASED DECODING OF DATA RECEIVED OVER AN OPTICAL COMMUNICATION PATH
A system for transmitting data over an optical communication path is configured to receive data to be encoded in a bitstream for transmission using an optical communication path and encodes the received data to obtain a bitstream. The system is further configured to determine that the bitstream includes a sequence of consecutive bits, and obtain a power level at which to transmit a portion of the bitstream based on a count of the consecutive bits in the sequence. The system may be configured to selectively activate a light source at a power level according to a modulation scheme to optically transmit the portion of the bitstream at the power level.
ENCODING/DECODING METHOD, ENCODER/DECODER, STORAGE METHOD AND DEVICE
The present disclosure relates to an encoding/decoding method, an encoder/decoder, and a storage method and device, which relates to the technical field of data storage. The encoding method comprises: determining a first bit of the encoded sequence based on a first bit of the first binary code sequence, a first bit of the second binary code sequence, and a reference symbol, the reference symbol being any one of the four different kinds of symbols; determining a current bit of the encoded sequence based on a current bit of the first binary code sequence, a current bit of the second binary code sequence, and a previous bit of the encoded sequence, the current bit of the encoded sequence being a bit other than the first bit of the encoded sequence.
Hybrid comparison for unicode text strings consisting primarily of ASCII characters
A method compares text strings having Unicode encoding. The method receives a first string S=s.sub.1s.sub.2 . . . s.sub.n and a second string T=t.sub.1t.sub.2 . . . t.sub.m, where s.sub.1, s.sub.2, . . . , s.sub.n and t.sub.1, t.sub.2, . . . , t.sub.m are Unicode characters. The method computes a first string weight for the first string S according to a weight function . When S consists of ASCII characters, (S)=S. When S consists of ASCII characters and some accented ASCII characters that are replaceable by ASCII characters, (S)=g(s.sub.1)g(s.sub.2) . . . g(s.sub.n), where g(s.sub.i)=s.sub.i when s.sub.i is an ASCII character and g(s.sub.i)=s.sub.i when s.sub.i is an accented ASCII character that is replaceable by the corresponding ASCII character s.sub.i. The method also computes a second string weight for the second text string T. Equality of the strings is tested using the string weights.
Hybrid comparison for unicode text strings consisting primarily of ASCII characters
A method compares text strings having Unicode encoding. The method receives a first string S=s.sub.1s.sub.2 . . . s.sub.n and a second string T=t.sub.1t.sub.2 . . . t.sub.m, where s.sub.1, s.sub.2, . . . , s.sub.n and t.sub.1, t.sub.2, . . . , t.sub.m are Unicode characters. The method computes a first string weight for the first string S according to a weight function . When S consists of ASCII characters, (S)=S. When S consists of ASCII characters and some accented ASCII characters that are replaceable by ASCII characters, (S)=g(s.sub.1)g(s.sub.2) . . . g(s.sub.n), where g(s.sub.i)=s.sub.i when s.sub.i is an ASCII character and g(s.sub.i)=s.sub.i when s.sub.i is an accented ASCII character that is replaceable by the corresponding ASCII character s.sub.i. The method also computes a second string weight for the second text string T. Equality of the strings is tested using the string weights.
Bit string conversion
Systems, apparatuses, and methods related to bit string conversion are described. Circuitry can perform operations on bit strings, such as universal number and/or posit bit strings, to alter a level of precision (e.g., a dynamic range, resolution, etc.) of the bit strings. For instance, bit string conversion can include receiving, by a memory resource coupled to logic circuitry, a first bit string having a first bit string length. The first quantity of bits can comprise a first bit sub-set, a second bit sub-set, a third bit sub-set, and a fourth bit sub-set. The logic circuitry monitor numerical values corresponding to at least one bit sub-set of the bit string to determine a dynamic range corresponding to the data and/or precision corresponding to the data and generate a second bit string having a second bit string length based, at least in part, on the determined dynamic range of the data, the precision of the data.
Bit string conversion
Systems, apparatuses, and methods related to bit string conversion are described. Circuitry can perform operations on bit strings, such as universal number and/or posit bit strings, to alter a level of precision (e.g., a dynamic range, resolution, etc.) of the bit strings. For instance, bit string conversion can include receiving, by a memory resource coupled to logic circuitry, a first bit string having a first bit string length. The first quantity of bits can comprise a first bit sub-set, a second bit sub-set, a third bit sub-set, and a fourth bit sub-set. The logic circuitry monitor numerical values corresponding to at least one bit sub-set of the bit string to determine a dynamic range corresponding to the data and/or precision corresponding to the data and generate a second bit string having a second bit string length based, at least in part, on the determined dynamic range of the data, the precision of the data.
Compression and decompression engines and compressed domain processors
Compressed domain processors configured to perform operations on data compressed in a format that preserves order. The Compressed domain processors may include operations such as addition, subtraction, multiplication, division, sorting, and searching. In some cases, compression engines for compressing the data into the desired formats are provided.
Compression and decompression engines and compressed domain processors
Compressed domain processors configured to perform operations on data compressed in a format that preserves order. The Compressed domain processors may include operations such as addition, subtraction, multiplication, division, sorting, and searching. In some cases, compression engines for compressing the data into the desired formats are provided.