Patent classifications
H03M7/28
Method and device for binary coding of signals in order to implement digital MAC operations with dynamic precision
A computer-implemented method for coding a digital signal intended to be processed by a digital computing system includes the steps of: receiving a sample of the digital signal quantized on a number N.sub.d of bits, decomposing the sample into a plurality of binary words of parameterizable bit size N.sub.p, coding the sample through a plurality of pairs of values, each pair comprising one of the binary words and an address corresponding to the position of the binary word in the sample, transmitting the pairs of values to an integration unit in order to carry out a MAC operation between the sample and a weighting coefficient.
ROBOTICS ASSISTED PRODUCTION SUPPORT UTILITY
Embodiments of the present invention provide a system for converting ubiquitous language instructions to robotic process automation executable action steps and executing the action steps. A managing system receives an encrypted user input from a computing device of the user, where the user input comprises instructions entered in ubiquitous language (e.g., common vernacular, or other non-complex programming language). The user input is decrypted and an action keyword is identified from the ubiquitous language instructions. The action keyword for each instruction is compared to a conversion database to determine a set of execution steps associated with each action keyword. These execution steps are in a format that enables a robotic process automation system to perform the execution steps. The set of execution steps is then transmitted to the robotic process automation system that automatically performs the set of execution steps through a workstation or other operating station of the user.
ROBOTICS ASSISTED PRODUCTION SUPPORT UTILITY
Embodiments of the present invention provide a system for converting ubiquitous language instructions to robotic process automation executable action steps and executing the action steps. A managing system receives an encrypted user input from a computing device of the user, where the user input comprises instructions entered in ubiquitous language (e.g., common vernacular, or other non-complex programming language). The user input is decrypted and an action keyword is identified from the ubiquitous language instructions. The action keyword for each instruction is compared to a conversion database to determine a set of execution steps associated with each action keyword. These execution steps are in a format that enables a robotic process automation system to perform the execution steps. The set of execution steps is then transmitted to the robotic process automation system that automatically performs the set of execution steps through a workstation or other operating station of the user.
Apparatus and Methods for Neural Network Operations Supporting Fixed Point Numbers of Short Bit Length
Aspects for neural network operations with fixed-point number of short bit length are described herein. The aspects may include a fixed-point number converter configured to convert one or more first floating-point numbers to one or more first fixed-point numbers in accordance with at least one format. Further, the aspects may include a neural network processor configured to process the first fixed-point numbers to generate one or more process results.
METHOD AND DEVICE FOR DECODING DATA SEGMENTS DERIVED FROM OLIGONUCLEOTIDES AND RELATED SEQUENCER
Data segments derived from stored oligonucleotides or oligos are decoded, each oligo comprising nucleotides representing information units distributed within segment addresses and payloads, the addresses enabling to order the payloads. The addresses are extracted and the payloads are ordered in function of those addresses. The segments are further clustered into segment clusters in function of edit distances between reference addresses and the extracted addresses, each of those clusters being associated with one of the reference addresses. Cluster payloads associated respectively with at least part of the clusters are determined, and those cluster payloads are ordered in function of the reference addresses of the clusters associated with the cluster payloads.
Compressing probability tables for entropy coding
This disclosure provides methods, devices, and systems for data compression. The present implementations more specifically relate to encoding techniques for compressing probability tables used for entropy coding. In some aspects, an entropy encoder may encode a probability table so that one or more contexts are represented by fewer bits than would otherwise be needed to represent the frequency of each symbol as a proportion of the total frequency of all symbols associated with such contexts. For example, if a given row of the probability table (prior to encoding) includes a number (M) of entries each having a binary value represented by a number (K) of bits, the same row of entries may be represented by fewer than M*K bits in the encoded probability table.
Systems and methods for generating code from executable models with floating point data
Systems and methods generate code from an executable model. The model may operate on variables having floating point data types. The systems and methods may unpack the sign, exponent, and mantissa components of the floating point variables, and interpret them as boolean, integer, or fixed-point data types. The systems and methods may include operators that operate on the extracted sign, exponent, and mantissa components, and that produce sign, exponent, and mantissa outputs having boolean, integer or fixed-point data types. The systems and methods may pack the sign, exponent, and mantissa components of the output into an integer and reinterpret the integer as a floating point data type. Having replaced the floating point data types with boolean, integer or fixed-point data types, the generated code may be suitable for programmable logic devices and/or microcontrollers that lack Floating Point Units (FPUs).
System and Method for Bitstream Decoding with Compiler-Generated Syntax Trees
Disclosed herein are systems and methods for converting physical input signals into bitstreams using syntax trees regardless of the physical input signal's protocol. Using declarative language definitions within a protocol declaration, a test and measurement system can compile a syntax tree that automatically translates the input data into a proper bitstream output. The declarative language definitions within the protocol declaration allow custom or standard protocol rules to be written for multiple or arbitrary input protocols without writing unsafe functions, having to access memory, or debugging more complex language codes.
Method and apparatus for converting from integer to floating point representation
Apparatus and methods for conversion from signed integer to a floating point representation are provided. Two's complementation and lead zero count operations are performed in parallel. Exponent generation and mantissa shifting are performed in parallel. Generation of the floating point exponent from the signed integer, including application of a scaling factor, is performed using a 3:2 compressor or carry-save adder and an adder. Two's complementation for generation of the mantissa in unsigned integer format is performed using an adder. Lead zero count for controlling mantissa shifting is performed by one's complementing the signed integer if negative, counting lead zeros in the one's complement output, and determining, using the one's complement output, whether the one's complement lead zero count differs from the two's complement lead zero count by one.
Method and apparatus for converting from integer to floating point representation
Apparatus and methods for conversion from signed integer to a floating point representation are provided. Two's complementation and lead zero count operations are performed in parallel. Exponent generation and mantissa shifting are performed in parallel. Generation of the floating point exponent from the signed integer, including application of a scaling factor, is performed using a 3:2 compressor or carry-save adder and an adder. Two's complementation for generation of the mantissa in unsigned integer format is performed using an adder. Lead zero count for controlling mantissa shifting is performed by one's complementing the signed integer if negative, counting lead zeros in the one's complement output, and determining, using the one's complement output, whether the one's complement lead zero count differs from the two's complement lead zero count by one.