Patent classifications
H03M13/03
Conditional hardware acceleration of secure forward error correction (FEC) processing
It is determined whether hardware acceleration is available for the incoming data packet. Responsive to hardware acceleration availability, and based on the received FEC conditions, it is determined, for a session associated with the incoming data packet, whether to hardware decrypt the incoming data packet before decoding the incoming data packet or to hardware decrypt after decoding the incoming data packet.
Conditional hardware acceleration of secure forward error correction (FEC) processing
It is determined whether hardware acceleration is available for the incoming data packet. Responsive to hardware acceleration availability, and based on the received FEC conditions, it is determined, for a session associated with the incoming data packet, whether to hardware decrypt the incoming data packet before decoding the incoming data packet or to hardware decrypt after decoding the incoming data packet.
Transmission apparatus including encoder, reception apparatus including decoder, and associated methods
An encoder and decoder using LDPC-CC which avoid lowering the transmission efficiency of information while not deteriorating error correction performance, even at termination; and an encoding method of the same. A termination sequence length determining unit determines the sequence length of a termination sequence transmitted added to the end of an information sequence, according to the information length (information size) and encoding rate of the information sequence. A parity calculation unit carries out LDPC-CC coding on the information sequence and the known-information sequence necessary for generating a termination sequence of the determined termination sequence length, and calculates a parity sequence.
Base station
A base station is provided. The base station includes a first reception unit configured to receive, from a user apparatus included in a mobile communication system including the base station, another base station communicating with the base station, and the user apparatus communicating with the base station, first data including quality information used for scheduling controlling performed by the other base station, and second data different from the first data. The base station also includes a transmission unit configured to transmit the first data to the other base station by giving higher priority to the first data than to the second data.
STORAGE ERROR CORRECTION USING CYCLIC-CODE BASED LDPC CODES
Techniques are described for joint encoding and decoding of information symbols. In one embodiment, a method for joint encoding includes, in part, obtaining a sequence of information symbols, generating a plurality of cyclic codewords each corresponding to a portion of the sequence of information symbols, jointly encoding the plurality of cyclic codewords to generate at least one combined codeword, and providing the combined codeword to a device. The at least one combined codeword may be generated through Galois Fourier Transform (GFT). In one embodiment, a method for joint decoding includes, in part, obtaining a sequence of encoded symbols, wherein the sequence of encoded symbols is generated through GFT, jointly decoding the sequence of encoded symbols using an iterative soft decision decoding algorithm to generate a decoded sequence, transforming the decoded sequence to generate a plurality of cyclic codewords, and decoding the plurality of cyclic codewords to generate a plurality of decoded information symbols.
Cache memory management using fingerprints
A network device includes at least one communication ingress port, ingress packet processing circuitry and a packet-action cache memory (PACM). The at least one communication ingress port is configured to receive packets including packet headers from a network. The ingress packet processing circuitry is configured to receive the packets and to process the packets in accordance with respective packet actions specified for the packets. The PACM is configured to store one or more of the packet actions in association with one or more respective fingerprints which are calculated over the packet headers of the corresponding packets, for use by the ingress packet processing circuitry. The fingerprints are smaller than the corresponding packet headers.
Packet Processing Method and Apparatus, and Chip
A packet processing method includes generating, by a processor of a network device, a first encoding task based on M original packets in a to-be-processed first data stream, where M is a positive integer, and where the first encoding task instructs to encode the M original packets; and performing, by a target hardware engine of the network device and based on the first encoding task, forward error correction (FEC) encoding on the M original packets to obtain R redundant packets, where R is a positive integer.
Packet Processing Method and Apparatus, and Chip
A packet processing method includes generating, by a processor of a network device, a first encoding task based on M original packets in a to-be-processed first data stream, where M is a positive integer, and where the first encoding task instructs to encode the M original packets; and performing, by a target hardware engine of the network device and based on the first encoding task, forward error correction (FEC) encoding on the M original packets to obtain R redundant packets, where R is a positive integer.
Transmitting apparatus and signal processing method thereof
A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.
Enhanced polarization weighting to enable scalability in polar code bit distribution
Methods and devices are described for determining reliabilities of bit positions in a bit sequence for information bit allocation using polar codes. The reliabilities are calculated using a weighted summation over a binary expansion of each bit position, wherein the summation is weighted by an exponential factor that is selected based at least in part on the coding rate of the polar code. Information bits and frozen bits are allocated to the bit positions based on the determined reliabilities, and data is polar encoded as the information bits. The polar encoded data is then transmitted to a remote device.