A pair of ground planes arranged in parallel, a dielectric medium disposed in between the pair of ground planes, and a set of at least four signal conductors disposed in the dielectric medium, the set of at least four signal conductors having (i) a first pair of signal conductors arranged proximate to a first ground plane of the pair of ground planes and (ii) a second pair of signal conductors arranged proximate to a second ground plane of the pair of ground planes, each signal conductor of the set of at least four signal conductors configured to carry a respective signal corresponding to a symbol of a codeword of a vector signaling code.

A wireless communication method and protocol for wireless RF transmission of data, e.g. audio data, with low latency. The method involves a fixed part (FP) serving as synchronization master, and one or more portable parts (PP) being synchronization slaves. The FP performs scanning between a set of supported channels within one limited frequency band, such as within an ISM band. Further, the FP performs collecting measures of RF interference level on at least a plurality of the supported channels in response to the scanning, preferably using own interference level measurement and by collecting RSSI data from the PP for the supported channels. In response to these measures of RF interference level, the FP executes a selection algorithm for selecting and re-selecting first and second different frequencies for respective first and second duplex RF bearers from the set of supported channels to select the channels with least RF interference. Finally, the FP transmits, in one frame of such as 1 ms to 3 ms length, the same data packet on both of said first and second duplex RF bearer frequencies to the PP. This provides a roboust and low latency wireless interface suitable for Human Interface Devices and audio devices, e.g. for gaining equipment.

A wireless communication method and protocol for wireless RF transmission of data, e.g. audio data, with low latency. The method involves a fixed part (FP) serving as synchronization master, and one or more portable parts (PP) being synchronization slaves. The FP performs scanning between a set of supported channels within one limited frequency band, such as within an ISM band. Further, the FP performs collecting measures of RF interference level on at least a plurality of the supported channels in response to the scanning, preferably using own interference level measurement and by collecting RSSI data from the PP for the supported channels. In response to these measures of RF interference level, the FP executes a selection algorithm for selecting and re-selecting first and second different frequencies for respective first and second duplex RF bearers from the set of supported channels to select the channels with least RF interference. Finally, the FP transmits, in one frame of such as 1 ms to 3 ms length, the same data packet on both of said first and second duplex RF bearer frequencies to the PP. This provides a roboust and low latency wireless interface suitable for Human Interface Devices and audio devices, e.g. for gaining equipment.

Methods, systems, and devices for generating a balanced codeword protected by an error correction code are described. A memory device may receive data bits for storage. Based on the data bits, the memory device may generate a codeword that includes the data bits, parity bits, and placeholder bits. The memory device may balance the codeword by inverting one or more packets of the codeword. After balancing the codeword, the memory device may store at least a portion of the codeword in memory so that a later operation or a decoding process reveals the packets that were inverted as part of the balancing process. Accordingly, the memory device may re-invert the appropriate packets to recover the original data bits.

A data storage device is disclosed comprising a non-volatile storage medium (NVSM). A first block of data is channel encoded into first channel data based on a channel code constraint, and the first channel data is error correction encoded to generate first redundancy bits. A second block of data is channel encoded into second channel data based on the channel code constraint and the first redundancy bits, and the first channel data and the second channel data are error correction encode to generate second redundancy bits. A third block of data is channel encoded into third channel data based on the channel code constraint and the second redundancy bits. The first, second and third channel data and the first and second redundancy bits are stored in the NVSM.

A method includes generating, by processing circuitry of a communications device, a partitioned complementary sequence based on information bits for transmission. The partitioned complementary sequence may include zero-valued elements. The method may include encoding a plurality of symbols on a plurality of orthogonal subcarriers using the partitioned complementary sequence. The encoding may include mapping additional information bits on subcarriers associated with the zero-valued elements of the partitioned complementary sequence. Additionally, the method may include controlling a radio of the communications device to transmit the plurality of symbols on the plurality of orthogonal subcarriers via an antenna of the communications device.

A network interface groups and encodes a plurality of bits into a plurality of bit blocks such that a number of bits within the fixed-length frame are available for use as parity bits in a fixed-length frame. The network interface device aggregates a first set of bit blocks and a second set of bit blocks into an aggregated bit block, and encodes a portion of the aggregated bit block using a first encoder to generate a first set of encoded bits according to a first error correction encoding scheme. The network interface device encodes a remaining portion of the aggregated bit block using a second encoder to generate a second set of encoded bits according to a second error correction encoding scheme. A number of parity bits generated by the first and second encoders does not exceed the number of bits in the fixed-length frame made available for use as parity bits.

A network interface groups and encodes a plurality of bits into a plurality of bit blocks such that a number of bits within the fixed-length frame are available for use as parity bits in a fixed-length frame. The network interface device aggregates a first set of bit blocks and a second set of bit blocks into an aggregated bit block, and encodes a portion of the aggregated bit block using a first encoder to generate a first set of encoded bits according to a first error correction encoding scheme. The network interface device encodes a remaining portion of the aggregated bit block using a second encoder to generate a second set of encoded bits according to a second error correction encoding scheme. A number of parity bits generated by the first and second encoders does not exceed the number of bits in the fixed-length frame made available for use as parity bits.

A data storage device is disclosed comprising a non-volatile storage medium (NVSM). A first block of data is channel encoded into first channel data based on a channel code constraint, and the first channel data is error correction encoded to generate first redundancy bits. A second block of data is channel encoded into second channel data based on the channel code constraint and the first redundancy bits, and the first channel data and the second channel data are error correction encode to generate second redundancy bits. A third block of data is channel encoded into third channel data based on the channel code constraint and the second redundancy bits. The first, second and third channel data and the first and second redundancy bits are stored in the NVSM.

A method and apparatus for decoding quasi-cyclic LDPC codes using a vertical layered iterative message passing algorithm. The algorithm of the method improves the efficiency of the check node update by using one or more additional magnitudes, predicted with predictive magnitude maps, for the computation of messages and update of the check node states. The method allows reducing the computational complexity, as well as the storage requirements, of the processing units in the check node update. Several embodiments for the apparatus are presented, using one or more predictive magnitude maps, targeting significant savings in resource usage and power consumption, while minimizing the impact on the error correction performance loss.